From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by sourceware.org (Postfix) with ESMTPS id 2B5493857023 for ; Wed, 5 Apr 2023 21:03:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2B5493857023 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-930129be52dso74343166b.1 for ; Wed, 05 Apr 2023 14:03:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680728626; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=GeJ6eeKJC0GGlhWbaV8EKKnnpb1DKHQrA/VC6ndtcp8=; b=BR3e6V8Rt7V0n1rDwKfeOrZNhm9cqNq1ZgO+C37lf5DG4j5/Mn7JMiQD9M/0nItN93 g7S59+eoweIURf/S3LonJEBnpvGjxdI/zB+xxuFoB3POtRPAdOgJKxwJ1J3TsHbtJ6M7 f6IlqBAY04c5p1FTCiPDWA/L2PxWhke+2R895DIZ9bua5n/hu8TG0vWOThvzhUuft15N FIhTYgG/CClP3XLvvHoQmWqw1Xe+YlELUaKzqrNqKrxeO/gBckLBAIL3/WFsznuQb2Zy rmfIb13rtBLgZlKrsQvcwZCZjPVcGzsZOXCQW0QkBXhiz+vNBiYVTCdkuHcuecDiBUTa R8PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680728626; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GeJ6eeKJC0GGlhWbaV8EKKnnpb1DKHQrA/VC6ndtcp8=; b=8MOEScW7rjm6Z+xdAlY5zGwoK8oOPdDP/5wJyL7jx7ZqaOwDz2U6tFiHr5fzQoGSqS bWVYbLjLq2d5nEU1+8n6v5iOA1IdbVy+ZiF1ONdEy90Bx+o17L0xgwr6ocGtf6PosUp9 tUGFf+fEqXJhhn+lz7gz/q8JakvG2td59CKzX0QUPoxFHTIAL7jLMIZHifq9WVA6crPq uUW0ld1GBOnRemXxRDqegFyj0rZTd1Jmx/x2ZYGDUluHUcS2JhttjYvtY4UWsZqnPzYO kVggRrtwc1BauV/wxNXx7gZKKCH2uN755TcAb3SenrO58XS9swNNsMzKCv/LmrzJ4N/I /2bQ== X-Gm-Message-State: AAQBX9cVjRikbtkQuqd479Ok7ezhJXhCZJRji7nMTH4QjYcpu+90LJC9 8lIGGT6gaZlDg78q1Kg37Yx31O1qoHjnC6A5YKE= X-Google-Smtp-Source: AKy350bRUEbAyf0s7r08U5jE9ueYYKCWPlE9emXyIv8Iq/ZcOeLFrlj/EGv+wNo55VTKwS6ESuFJ74Ie0lCYxIeVFtg= X-Received: by 2002:a50:8d5d:0:b0:502:3b58:9aa6 with SMTP id t29-20020a508d5d000000b005023b589aa6mr1950462edt.0.1680728625909; Wed, 05 Apr 2023 14:03:45 -0700 (PDT) MIME-Version: 1.0 References: <20230405162144.984598-1-hjl.tools@gmail.com> <20230405162144.984598-7-hjl.tools@gmail.com> In-Reply-To: <20230405162144.984598-7-hjl.tools@gmail.com> From: Noah Goldstein Date: Wed, 5 Apr 2023 16:03:34 -0500 Message-ID: Subject: Re: [PATCH 06/19] : Add RTM_FORCE_ABORT support To: "H.J. Lu" Cc: libc-alpha@sourceware.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Apr 5, 2023 at 11:23=E2=80=AFAM H.J. Lu via Libc-alpha wrote: > > Add RTM_FORCE_ABORT support to . > --- > manual/platform.texi | 3 +++ > sysdeps/x86/bits/platform/x86.h | 2 +- > sysdeps/x86/tst-get-cpu-features.c | 1 + > 3 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/manual/platform.texi b/manual/platform.texi > index 4453f6e1f4..2ab687cbba 100644 > --- a/manual/platform.texi > +++ b/manual/platform.texi > @@ -539,6 +539,9 @@ capability. > @item > @code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusabl= e. > > +@item > +@code{RTM_FORCE_ABORT} -- TSX_FORCE_ABORT MSR. > + > @item > @code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug. > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/= x86.h > index ee5be8190f..6d9dd6dacf 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -213,7 +213,7 @@ enum > x86_cpu_MD_CLEAR =3D x86_cpu_index_7_edx + 10, > x86_cpu_RTM_ALWAYS_ABORT =3D x86_cpu_index_7_edx + 11, > x86_cpu_INDEX_7_EDX_12 =3D x86_cpu_index_7_edx + 12, > - x86_cpu_INDEX_7_EDX_13 =3D x86_cpu_index_7_edx + 13, > + x86_cpu_RTM_FORCE_ABORT =3D x86_cpu_index_7_edx + 13, > x86_cpu_SERIALIZE =3D x86_cpu_index_7_edx + 14, > x86_cpu_HYBRID =3D x86_cpu_index_7_edx + 15, > x86_cpu_TSXLDTRK =3D x86_cpu_index_7_edx + 16, > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu= -features.c > index 1979da2174..8b7e70aee1 100644 > --- a/sysdeps/x86/tst-get-cpu-features.c > +++ b/sysdeps/x86/tst-get-cpu-features.c > @@ -162,6 +162,7 @@ do_test (void) > CHECK_CPU_FEATURE_PRESENT (AVX512_VP2INTERSECT); > CHECK_CPU_FEATURE_PRESENT (MD_CLEAR); > CHECK_CPU_FEATURE_PRESENT (RTM_ALWAYS_ABORT); > + CHECK_CPU_FEATURE_PRESENT (RTM_FORCE_ABORT); > CHECK_CPU_FEATURE_PRESENT (SERIALIZE); > CHECK_CPU_FEATURE_PRESENT (HYBRID); > CHECK_CPU_FEATURE_PRESENT (TSXLDTRK); > -- > 2.39.2 > LGTM Reviewed-by: Noah Goldstein