From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 1CD4B3857C62 for ; Fri, 30 Apr 2021 22:59:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 1CD4B3857C62 Received: by mail-pg1-x529.google.com with SMTP id p12so50380345pgj.10 for ; Fri, 30 Apr 2021 15:59:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xWUBFCnImfQr/dMZ/OdPgu++3b+toUnFu9fLfRZnTsI=; b=sZXny0G9QoImugHAiQwKlzsnFIjjoGYdeS5dTIrwcPOEReeIYPp2ZKzS0pmMtmRNeD EpbiHSfvrpUHSDMNa5GrWbG82szQSv2LfKAuO6DkyUnVPwKUuMh9x7kw9eS/RoaAruEq FzCpNATXHC+0vV8FF6C0qzfd1WnO/4pewCHUAIJronSmdNaqrCrg+i+MXBvTJx9ccxEk Lxe+8pJypdf7HxwytlY/Sqj8wZWuMk4J4BgVqxTubg8HPiNgrZjh4moBxCVE8Pi06h/H PGsYIUV7R/D2P0NnDavUzEC71F6EZmf2333y9oHAzlB2xvMf1eRfnrV1haI9DtRPdUFt yaTA== X-Gm-Message-State: AOAM5326CiEeL7BlxkE4bWyzRcQC+CkWtp7DmgHEeiXRuSKSFYqbBqBV ll7K1+n3Erzaqm0Mc6s9Gx0BS+i9p+2aGhUIpnc= X-Google-Smtp-Source: ABdhPJxLq2jVH5Kbfvs/QUVemLbK1cCnTpB0mg5A1OHHzspcAI360emgI8XxMTcJZvJEeDg9kzdGzEYubqc+hm4GMoc= X-Received: by 2002:a63:3dc5:: with SMTP id k188mr6700310pga.140.1619823597131; Fri, 30 Apr 2021 15:59:57 -0700 (PDT) MIME-Version: 1.0 References: <20210430182442.3612464-1-hjl.tools@gmail.com> In-Reply-To: <20210430182442.3612464-1-hjl.tools@gmail.com> From: Noah Goldstein Date: Fri, 30 Apr 2021 18:59:46 -0400 Message-ID: Subject: Re: [PATCH] x86: Set rep_movsb_threshold to 2112 on processors with FSRM To: "H.J. Lu" Cc: GNU C Library Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Apr 2021 22:59:59 -0000 On Fri, Apr 30, 2021 at 4:43 PM H.J. Lu via Libc-alpha wrote: > > The glibc memcpy benchmark on Intel Core i7-1065G7 (Ice Lake) showed > that REP MOVSB became faster after 2112 bytes: > > Vector + REP MOVSB REP MOVSB > length=2112, align1=0, align2=0: 24.20 24.40 > length=2112, align1=1, align2=0: 26.07 23.13 > length=2112, align1=0, align2=1: 27.18 28.13 > length=2112, align1=1, align2=1: 26.23 25.16 > length=2176, align1=0, align2=0: 23.18 22.52 > length=2176, align1=2, align2=0: 25.45 22.52 > length=2176, align1=0, align2=2: 27.14 27.82 > length=2176, align1=2, align2=2: 22.73 25.56 > length=2240, align1=0, align2=0: 24.62 24.25 > length=2240, align1=3, align2=0: 29.77 27.15 > length=2240, align1=0, align2=3: 35.55 29.93 > length=2240, align1=3, align2=3: 34.49 25.15 > length=2304, align1=0, align2=0: 34.75 26.64 > length=2304, align1=4, align2=0: 32.09 22.63 > length=2304, align1=0, align2=4: 28.43 31.24 > Do you know what is happening at: length=2304, align1=0, align2=4: 28.43 31.24 Seems align2 > align1 gets worse for larger sizes as well. I.e from my Icelake (1 run): w/o Patch w/ Patch length=3648, align1=0, align2=25: 72.91 83.99 length=3712, align1=0, align2=26: 72.52 84.92 length=3776, align1=0, align2=27: 76.16 84.02 length=3840, align1=0, align2=28: 75.44 90.13 length=3904, align1=0, align2=29: 81.62 84.43 length=3968, align1=0, align2=30: 76.82 93.39 length=4032, align1=0, align2=31: 80.01 89.89 length=4096, align1=0, align2=32: 72.89 97.50 > Use REP MOVSB for data size > 2112 bytes in memcpy on processors with > fast short REP MOVSB (FSRM). > > * sysdeps/x86/dl-cacheinfo.h (dl_init_cacheinfo): Set > rep_movsb_threshold to 2112 on processors with fast short REP > MOVSB (FSRM). > --- > sysdeps/x86/dl-cacheinfo.h | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h > index d9944250fc..3f04fb5019 100644 > --- a/sysdeps/x86/dl-cacheinfo.h > +++ b/sysdeps/x86/dl-cacheinfo.h > @@ -871,7 +871,10 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) > if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F) > && !CPU_FEATURE_PREFERRED_P (cpu_features, Prefer_No_AVX512)) > { > - rep_movsb_threshold = 2048 * (64 / 16); > + if (CPU_FEATURE_USABLE_P (cpu_features, FSRM)) > + rep_movsb_threshold = 2112; > + else > + rep_movsb_threshold = 2048 * (64 / 16); > #if HAVE_TUNABLES > minimum_rep_movsb_threshold = 64 * 8; > #endif > @@ -879,7 +882,10 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) > else if (CPU_FEATURE_PREFERRED_P (cpu_features, > AVX_Fast_Unaligned_Load)) > { > - rep_movsb_threshold = 2048 * (32 / 16); > + if (CPU_FEATURE_USABLE_P (cpu_features, FSRM)) > + rep_movsb_threshold = 2112; > + else > + rep_movsb_threshold = 2048 * (32 / 16); > #if HAVE_TUNABLES > minimum_rep_movsb_threshold = 32 * 8; > #endif > -- > 2.31.1 >