From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x1133.google.com (mail-yw1-x1133.google.com [IPv6:2607:f8b0:4864:20::1133]) by sourceware.org (Postfix) with ESMTPS id 7B66B3856DE3 for ; Wed, 15 Jun 2022 20:35:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7B66B3856DE3 Received: by mail-yw1-x1133.google.com with SMTP id 00721157ae682-3137c877092so72593967b3.13 for ; Wed, 15 Jun 2022 13:35:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=lyKoLCft856DRjG29l48DsVnZC+icYavM2X5tN3wvhg=; b=BUcaW8z3LwBgqvGODrXjTgmi1VpqVzqpfV0kGOHXhmwR6Gxg3nRFLwbWemb5AnsSCD SUiAtFoVqxFucXjOhjMozTyarOCiaOcBdFCfUXkUMOhbzjfhy5/gngF4vztihX7v5SPD MZI2SZuUEZhkqG9lAx2PIjhrJz+rWnpkng2C+y9dxT/6UrjizLkZKZ2zhTi68z/3ECjH rAjXRUjZVLdiX1EgsjWzaAzZ51wmLx3HMc2S6GvB/UuzOf6RPWz1wQVdlAi99GMsYPrx Jao615wxj9loTPnbD3FdmSLCVKtvMVeBRyw5Tag9hDxfxYM2qX8x5HHdKs6lxlSyynK5 XY2A== X-Gm-Message-State: AJIora+O9n/1XUs4IH3XdMrg+jkyXgh8NAMwjjYt4Y2PfbMP/xYX3XI+ rToivD7KhaYEIpfc8gGikruVvmv8rJZB/aPohmY= X-Google-Smtp-Source: AGRyM1tkH1nhuEOOeXsxQn3kKutmFPOgbj/4LhJWOUOoMYyJrtzbSKp0X8LpkE6/5fx+au/Evg0V1coROj1kmHH0Ado= X-Received: by 2002:a81:1b12:0:b0:310:f2f:1727 with SMTP id b18-20020a811b12000000b003100f2f1727mr1621814ywb.294.1655325315872; Wed, 15 Jun 2022 13:35:15 -0700 (PDT) MIME-Version: 1.0 References: <20220615174129.620476-2-goldstein.w.n@gmail.com> <20220615195237.3685347-1-goldstein.w.n@gmail.com> In-Reply-To: From: Noah Goldstein Date: Wed, 15 Jun 2022 13:35:05 -0700 Message-ID: Subject: Re: [PATCH v6 2/3] x86: Add bounds `x86_non_temporal_threshold` To: "H.J. Lu" Cc: GNU C Library , "Carlos O'Donell" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jun 2022 20:35:17 -0000 On Wed, Jun 15, 2022 at 1:27 PM H.J. Lu wrote: > > On Wed, Jun 15, 2022 at 12:52 PM Noah Goldstein wrote: > > > > The lower-bound (16448) and upper-bound (SIZE_MAX / 16) are assumed > > by memmove-vec-unaligned-erms. > > > > The lower-bound is needed because memmove-vec-unaligned-erms unrolls > > the loop aggressively in the L(large_memset_4x) case. > > > > The upper-bound is needed because memmove-vec-unaligned-erms > > right-shifts the value of `x86_non_temporal_threshold` by > > LOG_4X_MEMCPY_THRESH (4) which without a bound may overflow. > > > > The lack of lower-bound can be a correctness issue. The lack of > > upper-bound cannot. > > --- > > manual/tunables.texi | 2 +- > > sysdeps/x86/dl-cacheinfo.h | 8 +++++++- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/manual/tunables.texi b/manual/tunables.texi > > index 1482412078..2c076019ae 100644 > > --- a/manual/tunables.texi > > +++ b/manual/tunables.texi > > @@ -47,7 +47,7 @@ glibc.malloc.mxfast: 0x0 (min: 0x0, max: 0xffffffffffffffff) > > glibc.elision.skip_lock_busy: 3 (min: -2147483648, max: 2147483647) > > glibc.malloc.top_pad: 0x0 (min: 0x0, max: 0xffffffffffffffff) > > glibc.cpu.x86_rep_stosb_threshold: 0x800 (min: 0x1, max: 0xffffffffffffffff) > > -glibc.cpu.x86_non_temporal_threshold: 0xc0000 (min: 0x0, max: 0xffffffffffffffff) > > +glibc.cpu.x86_non_temporal_threshold: 0xc0000 (min: 0x4040, max: 0x0fffffffffffffff) > > glibc.cpu.x86_shstk: > > glibc.cpu.hwcap_mask: 0x6 (min: 0x0, max: 0xffffffffffffffff) > > glibc.malloc.mmap_max: 0 (min: -2147483648, max: 2147483647) > > diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h > > index cc3b840f9c..c493956259 100644 > > --- a/sysdeps/x86/dl-cacheinfo.h > > +++ b/sysdeps/x86/dl-cacheinfo.h > > @@ -931,8 +931,14 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) > > > > TUNABLE_SET_WITH_BOUNDS (x86_data_cache_size, data, 0, SIZE_MAX); > > TUNABLE_SET_WITH_BOUNDS (x86_shared_cache_size, shared, 0, SIZE_MAX); > > + /* SIZE_MAX >> 4 because memmove-vec-unaligned-erms right-shifts the value of > > + 'x86_non_temporal_threshold' by `LOG_4X_MEMCPY_THRESH` (4) and it is best > > + if that operation cannot overflow. Minimum of 0x4040 (16448) because the > > + L(large_memset_4x) loops need 64-byte to cache align and enough space for > > + at least 1 iteration of 4x PAGE_SIZE unrolled loop. Both values are > > + reflected in the manual. */ > > TUNABLE_SET_WITH_BOUNDS (x86_non_temporal_threshold, non_temporal_threshold, > > - 0, SIZE_MAX); > > + 0x20000, SIZE_MAX >> 4); > > The lower bound should be 0x4040. Done in V7. > > > TUNABLE_SET_WITH_BOUNDS (x86_rep_movsb_threshold, rep_movsb_threshold, > > minimum_rep_movsb_threshold, SIZE_MAX); > > TUNABLE_SET_WITH_BOUNDS (x86_rep_stosb_threshold, rep_stosb_threshold, 1, > > -- > > 2.34.1 > > > > > -- > H.J.