From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by sourceware.org (Postfix) with ESMTPS id 5BFBD3858D1E for ; Mon, 3 Oct 2022 21:11:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5BFBD3858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x633.google.com with SMTP id a2so4723539ejx.10 for ; Mon, 03 Oct 2022 14:11:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=Ftzk38uKYDAPE2fzSYST5PlWZr9w8HyVNS5BQaTqJVs=; b=QxrLNHsUyAZVlmcm59NlQO493nWFvu5Y2BYcBifwxUEvEm/O3L8TQReBLCYL57dkBe HpAFZuKw/5vMvms5AsJQflw9/xaEWw89Wj1evLPcuwyec5Zrmmguid9TRoJn75lbPFTF bR4ZcjyWD+rWrdCKxFlVuL96tGGGPQAx5blpMOrj/WxN6px8NHyyDSkc2wAJEY/Cv++3 O6hvRkofzuYDzeoVnt2p6vYXZAo3b0DRFLXtlt8ezcRHMtRYTNvO5EO2HCG7bCfeMKZf D4eHoY3BvRr6QjS8/t5PVx2uisSJmBflInMMu+KM+ngVPeq9/ZeMMY/urpJCnQSSQiYk mM0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=Ftzk38uKYDAPE2fzSYST5PlWZr9w8HyVNS5BQaTqJVs=; b=NKK9Rf7bvd+do9lx4umzb6EJohSyjm7j3znYS0UIfYNb1b0g695bfA78nAZQ3DZl5y iEAqHA5dejj1MxeQFJx/By86laJLo/CRLrYF01wupfmkuvqFWNXRLhiaJ2IeGC+l8DpX /IeVdIHP3ZFwhcREtdOTe8isqsVMz+6QmQdfIhH/v2GBYB9hc5SV3Hh622/tEcUyPDCW zwCkbsd/wSlPl0ULfN+n4RrtZauDFCNKJA9MpZpbsJdtEZsmGFroXbOuSIy2nA6pUIG2 duJ70+qgHFuJoXctrCflCcu2kz9k19Zmpy8lgqUTHu4czdpkbhvpIDAuk3goJqYVN/QJ NCJw== X-Gm-Message-State: ACrzQf0N6ZnxIfW6iUNNYYB0sMRsb+J9xpfb0yPFDWnJ+XmY8xs17XpX DNWiHSdk1rI6NU/2cUza9dF9At7lE22ocJ8jZMdKXccFR5k= X-Google-Smtp-Source: AMsMyM6Ib5E5Gu+xuVlbpyf6rFg40I31pIMO+CwaN+9V1Ykd5YdQHj3e7oWYYZ+7OpZVciLKnHYl47BkmU0LXgZLR+Q= X-Received: by 2002:a17:906:eeca:b0:730:6880:c397 with SMTP id wu10-20020a170906eeca00b007306880c397mr16197783ejb.593.1664831475170; Mon, 03 Oct 2022 14:11:15 -0700 (PDT) MIME-Version: 1.0 References: <20221003195944.3274548-1-aurelien@aurel32.net> In-Reply-To: <20221003195944.3274548-1-aurelien@aurel32.net> From: Noah Goldstein Date: Mon, 3 Oct 2022 14:11:04 -0700 Message-ID: Subject: Re: [PATCH v3 0/8] x86: Fix AVX2 string functions requiring BMI1, BMI2 or LZCNT (BZ #29611) To: Aurelien Jarno Cc: libc-alpha@sourceware.org, "H . J . Lu" , Sunil K Pandey Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Oct 3, 2022 at 12:59 PM Aurelien Jarno wrote: > > Some early Intel Haswell CPU have AVX2 instructions, but do not have > BMI1 and BMI2 instructions. Some AVX2 string functions only check for > AVX2, but use BMI1, BMI2 or LZCNT instructions. This patchset tries to > fix that. > > While most fixes only change ifunc-impl-list.c, and thus only concerns > the testsuite, the changes to str*cmp and wcs(n)cmp are a real issue > affecting early Intel Haswell CPU, reported to affect Debian Sid and > Fedora Rawhide. > > On the other hand, the check for LZCNT in memrchr is purely for > correctness, I am not aware of a CPU implementing AVX2 without LZCNT. > > This has been tested by remplacing all BMI1 and BMI2 instructions in the > source code by the "ud2" instruction and disabling the BMI1, BMI2 > feature detection, and running the testsuite. > > Resolves: BZ #29611 > > Changes v2 -> v3: > - Change the way patches are split. No code change. > > Change v1 -> v2: > - Better scan for BMI2 instructions (shlx and shrx) and BMI1 > instructions (blsmsk) instructions following the feedback from Noah > Goldstein > > Aurelien Jarno (8): > x86: include BMI1 and BMI2 in x86-64-v3 level > x86-64: Require BMI2 for AVX2 str(n)casecmp implementations > x86-64: Require BMI2 for AVX2 strcmp implementation > x86-64: Require BMI2 for AVX2 strncmp implementation > x86-64: Require BMI2 for AVX2 wcs(n)cmp implementations > x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations > x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementation > x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations > > sysdeps/x86/get-isa-level.h | 2 + > sysdeps/x86/isa-level.h | 2 + > sysdeps/x86_64/multiarch/ifunc-avx2.h | 2 + > sysdeps/x86_64/multiarch/ifunc-impl-list.c | 86 ++++++++++++++++----- > sysdeps/x86_64/multiarch/ifunc-strcasecmp.h | 1 + > sysdeps/x86_64/multiarch/strcmp.c | 4 +- > sysdeps/x86_64/multiarch/strncmp.c | 4 +- > 7 files changed, 76 insertions(+), 25 deletions(-) > > -- > 2.35.1 > LGTM. Reviewed-by: Noah Goldstein