public inbox for libc-alpha@sourceware.org
 help / color / mirror / Atom feed
From: Noah Goldstein <goldstein.w.n@gmail.com>
To: Noah Goldstein <goldstein.w.n@gmail.com>,
	libc-alpha@sourceware.org,  "H . J . Lu" <hjl.tools@gmail.com>,
	Sunil K Pandey <skpgkp2@gmail.com>
Subject: Re: [PATCH v2 0/6] x86: Fix AVX2 string functions requiring BMI1, BMI2 or LZCNT (BZ #29611)
Date: Sun, 2 Oct 2022 17:11:11 -0400	[thread overview]
Message-ID: <CAFUsyfKRM0wjGCeh0TCdhWTbWTZFd4oaavWnND7mjJCCU4af0g@mail.gmail.com> (raw)
In-Reply-To: <YznTv8vMxdn3CAVV@aurel32.net>

On Sun, Oct 2, 2022 at 2:09 PM Aurelien Jarno <aurelien@aurel32.net> wrote:
>
> On 2022-10-02 09:21, Noah Goldstein wrote:
> > On Sun, Oct 2, 2022 at 5:34 AM Aurelien Jarno <aurelien@aurel32.net> wrote:
> > >
> > > Some early Intel Haswell CPU have AVX2 instructions, but do not have
> > > BMI1 and BMI2 instructions. Some AVX2 string functions only check for
> > > AVX2, but use BMI1, BMI2 or LZCNT instructions. This patchset tries to
> > > fix that.
> > >
> > > While most fixes only change ifunc-impl-list.c, and thus only concerns
> > > the testsuite, the strn(case)cmp is a real issue affecting early Intel
> >
> > str(case)cmp as well, correct?
>
> Oops, yes forgot to update the cover letter on that aspect.
>
> > > Haswell CPU, reported to affect Debian Sid and Fedora Rawhide.
> > >
> > > On the other hand, the check for LZCNT in memrchr is purely for
> > > correctness, I am not aware of a CPU implementing AVX2 without LZCNT.
> > >
> > > This has been tested by remplacing all BMI1 and BMI2 instructions in the
> > > source code by the "ud2" instruction and disabling the BMI1, BMI2
> > > feature detection, and running the testsuite.
> > >
> > > Resolves: BZ #29611
> > >
> > > Change v1 -> v2:
> > > - Better scan for BMI2 instructions (shlx and shrx) and BMI1
> > >   instructions (blsmsk) instructions following the feedback from Noah
> > >   Goldstein
> > >
> > > Aurelien Jarno (6):
> > >   x86: include BMI1 and BMI2 in x86-64-v3 level
> > >   x86-64: Require BMI2 for AVX2 str*cmp and wcs(n)cmp implementations
> > >   x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations
> > >   x86-64: Require LZCNT for AVX2 memrchr implementation
> > >   x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations
> > >   x86-64: Require BMI2 for AVX2 memrchr implementation
> > >
> > >  sysdeps/x86/get-isa-level.h                 |  2 +
> > >  sysdeps/x86/isa-level.h                     |  2 +
> > >  sysdeps/x86_64/multiarch/ifunc-avx2.h       |  2 +
> > >  sysdeps/x86_64/multiarch/ifunc-impl-list.c  | 86 ++++++++++++++++-----
> > >  sysdeps/x86_64/multiarch/ifunc-strcasecmp.h |  1 +
> > >  sysdeps/x86_64/multiarch/strcmp.c           |  4 +-
> > >  sysdeps/x86_64/multiarch/strncmp.c          |  4 +-
> > >  7 files changed, 76 insertions(+), 25 deletions(-)
> > >
> > > --
> > > 2.35.1
> > >
> >
>
> --
> Aurelien Jarno                          GPG: 4096R/1DDD8C9B
> aurelien@aurel32.net                 http://www.aurel32.net

Patchset looks good.

Do you have commit permissions? If not I can push them for you.

Thanks for the bugfix!

NB:
the str*(case)cmp, wcs(n)cmp bug affects 2.36, 2.35, 2.34, 2.33.

  reply	other threads:[~2022-10-02 21:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-02 12:34 Aurelien Jarno
2022-10-02 12:34 ` [PATCH v2 1/6] x86: include BMI1 and BMI2 in x86-64-v3 level Aurelien Jarno
2022-10-02 21:07   ` Noah Goldstein
2022-10-02 12:34 ` [PATCH v2 2/6] x86-64: Require BMI2 for AVX2 str*cmp and wcs(n)cmp implementations Aurelien Jarno
2022-10-02 21:08   ` Noah Goldstein
2022-10-03 16:19     ` Sunil Pandey
2022-10-03 17:35       ` Aurelien Jarno
2022-10-03 17:50         ` Noah Goldstein
2022-10-03 18:43           ` Sunil Pandey
2022-10-03 19:21             ` Aurelien Jarno
2022-10-03 19:59               ` Aurelien Jarno
2022-10-03 20:51                 ` Sunil Pandey
2022-10-02 12:34 ` [PATCH v2 3/6] x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations Aurelien Jarno
2022-10-02 21:08   ` Noah Goldstein
2022-10-02 12:34 ` [PATCH v2 4/6] x86-64: Require LZCNT for AVX2 memrchr implementation Aurelien Jarno
2022-10-02 21:08   ` Noah Goldstein
2022-10-02 12:34 ` [PATCH v2 5/6] x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations Aurelien Jarno
2022-10-02 21:08   ` Noah Goldstein
2022-10-02 12:34 ` [PATCH v2 6/6] x86-64: Require BMI2 for AVX2 memrchr implementation Aurelien Jarno
2022-10-02 21:09   ` Noah Goldstein
2022-10-02 16:21 ` [PATCH v2 0/6] x86: Fix AVX2 string functions requiring BMI1, BMI2 or LZCNT (BZ #29611) Noah Goldstein
2022-10-02 18:09   ` Aurelien Jarno
2022-10-02 21:11     ` Noah Goldstein [this message]
2022-10-03 17:36       ` Aurelien Jarno
2022-10-03 17:51         ` Noah Goldstein

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAFUsyfKRM0wjGCeh0TCdhWTbWTZFd4oaavWnND7mjJCCU4af0g@mail.gmail.com \
    --to=goldstein.w.n@gmail.com \
    --cc=hjl.tools@gmail.com \
    --cc=libc-alpha@sourceware.org \
    --cc=skpgkp2@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).