From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by sourceware.org (Postfix) with ESMTPS id C52303858D32 for ; Sun, 2 Oct 2022 16:21:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C52303858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x62d.google.com with SMTP id sd10so17946336ejc.2 for ; Sun, 02 Oct 2022 09:21:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=x84wfKE4gAe7Stb5eBVQ3XEbmrJQ8pMSqn3IszbvJEw=; b=YXLj26gWTLtnpzGlQVBuhNQnCNYnSxXBsuDzjvqnVCZuOuScCeI+83uHCTBeuTvmBB T3n+IbT+2S4Vx+I2jqYdqREcG1PCLQ++Hkw4jpR4Z+VaiZgkUmqME3xutBrqejw4lrcd ghpd9gDEM8BkX9echTg/+0ikwix3KQ+FQsl0vgOlOewpCG5nLbzwOTbFwFMf1Q1fxLQj OSIz+wblWfamkEFYET93Cuai5oUcnVz3enIebbI8xcgqXy1cuKPTAz3/6eUNCk/YrJ25 zW/iHVxByGanXMDGjQg1cXOZm3/WWbmG7Ih86cd/0qqI5kwDFx2s0WjAEfRF/yuoPjHm YyVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=x84wfKE4gAe7Stb5eBVQ3XEbmrJQ8pMSqn3IszbvJEw=; b=WWlnqscAz4RpZIPHYSp5k3p6AOLVAedCgH28VJcgGYMLM5lsRBVbplAbDOCHUzp3gm UPNl3obgP52QWxegsXlJLIwx9jCQpJH1PBfvwcb9u1ImXLupxvLj3Jo81BebCcxfA9ua 9HylCqEtT7i0UWQDR8xMYiPu1VmlvOcDdyjenXPmBve7MFXsTxwWtKg22PrIfdaQP3Fk dRZmK9Tr1IPWzFsaqU7g4hOgIX9bAdltidEonwkfKzjMmCg3vDd0OU4pAyUq8N9IfweS CcDDV6fYubtLB3bsPp/V6VCVo7XPfW5s166sUj/lbBqQP5bLBCvWp6E99lY+HRO7qIQa UgCQ== X-Gm-Message-State: ACrzQf2NXZGkVTXL0wE8NSLCZzubAI05uKrwfDTP/WX31haT/3qbxCYf I+zpUa04Dn+6t0mJ189ZLO+QEHfB7R3KkLuuIYRERgvT X-Google-Smtp-Source: AMsMyM7/BY8u3YVAZkXQLW18KK+KHmSUpcKhUXM89e+RmBvkYTebnhJYUceRWqykAhVgGkMb3GAp6A5dcG+8s0iX94I= X-Received: by 2002:a17:907:6ea1:b0:783:cc69:342 with SMTP id sh33-20020a1709076ea100b00783cc690342mr12231415ejc.97.1664727678454; Sun, 02 Oct 2022 09:21:18 -0700 (PDT) MIME-Version: 1.0 References: <20221002123424.3079805-1-aurelien@aurel32.net> In-Reply-To: <20221002123424.3079805-1-aurelien@aurel32.net> From: Noah Goldstein Date: Sun, 2 Oct 2022 09:21:07 -0700 Message-ID: Subject: Re: [PATCH v2 0/6] x86: Fix AVX2 string functions requiring BMI1, BMI2 or LZCNT (BZ #29611) To: Aurelien Jarno Cc: libc-alpha@sourceware.org, "H . J . Lu" , Sunil K Pandey Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Sun, Oct 2, 2022 at 5:34 AM Aurelien Jarno wrote: > > Some early Intel Haswell CPU have AVX2 instructions, but do not have > BMI1 and BMI2 instructions. Some AVX2 string functions only check for > AVX2, but use BMI1, BMI2 or LZCNT instructions. This patchset tries to > fix that. > > While most fixes only change ifunc-impl-list.c, and thus only concerns > the testsuite, the strn(case)cmp is a real issue affecting early Intel str(case)cmp as well, correct? > Haswell CPU, reported to affect Debian Sid and Fedora Rawhide. > > On the other hand, the check for LZCNT in memrchr is purely for > correctness, I am not aware of a CPU implementing AVX2 without LZCNT. > > This has been tested by remplacing all BMI1 and BMI2 instructions in the > source code by the "ud2" instruction and disabling the BMI1, BMI2 > feature detection, and running the testsuite. > > Resolves: BZ #29611 > > Change v1 -> v2: > - Better scan for BMI2 instructions (shlx and shrx) and BMI1 > instructions (blsmsk) instructions following the feedback from Noah > Goldstein > > Aurelien Jarno (6): > x86: include BMI1 and BMI2 in x86-64-v3 level > x86-64: Require BMI2 for AVX2 str*cmp and wcs(n)cmp implementations > x86-64: Require BMI2 for AVX2 (raw|w)memchr implementations > x86-64: Require LZCNT for AVX2 memrchr implementation > x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementations > x86-64: Require BMI2 for AVX2 memrchr implementation > > sysdeps/x86/get-isa-level.h | 2 + > sysdeps/x86/isa-level.h | 2 + > sysdeps/x86_64/multiarch/ifunc-avx2.h | 2 + > sysdeps/x86_64/multiarch/ifunc-impl-list.c | 86 ++++++++++++++++----- > sysdeps/x86_64/multiarch/ifunc-strcasecmp.h | 1 + > sysdeps/x86_64/multiarch/strcmp.c | 4 +- > sysdeps/x86_64/multiarch/strncmp.c | 4 +- > 7 files changed, 76 insertions(+), 25 deletions(-) > > -- > 2.35.1 >