From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by sourceware.org (Postfix) with ESMTPS id 183C43858D20 for ; Wed, 5 Apr 2023 18:20:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 183C43858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x531.google.com with SMTP id cn12so143322011edb.4 for ; Wed, 05 Apr 2023 11:20:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680718807; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=BwsuVgX0RpBwaUqU5m/cEtyI6Yr/B4gQ4RThA8dXQcM=; b=ALjpPJN/sHTlxdSprJ+Lkb7u17GSOWYiqm/aA3W+6F/0/Bj7Tnrzfas6li8RphE9Cw cx8dObgq/stOXpbavfHtom4hPWv+hSFSi3f/c6amaY8dYeoSG4p2fCZ0FBks/9vMIfmg AEEom2P4I/LKQO5lJu+1TPvlW5p0Nl5s2uqCvPH9cvWgffNDVr2yoQmL/J7AXSQX6DbW YLa2qktbkSd25q3PMUAEz/m+OP8fwyDNEI/X4JsmyfelDUavl72VTm+8iWybxeXQudvl OzasX8Ox9sbZ1HuWmurRZo3Em8ZElmjx5hrdFsdhWQ4aMFLdk+w+MW6qjKYdhDH7pBY6 izIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680718807; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BwsuVgX0RpBwaUqU5m/cEtyI6Yr/B4gQ4RThA8dXQcM=; b=7bOOx1xNGh4FtQ2nNpH2Q5x2XxQhnlecYwE1ohogpbcmDMJpMJup1BPwi5yy3kWu8e sP5KdxZ+P4iKQDhWl5nbrI8xlpHFhcZhioHacSJmDO6wPImP3nc4AhcFUiYCUGk/WTEp 4S/aKdi/MFXjkjGbVxCaXaVBlsJfGR/xk7BPQtO/7/zE62hfahQclzOG6CLADU9C8q4n 5MdupAdriokcKpYOevZqVffBY8VkSkFtvBDgrP8Thcn60/IppDZukMD+Uc2xyZBv33G8 ToQ8uiB5XBcrU7Eqk1jh99ubRz1fqBvPlY0kW03occCYiq5xIdNb8ApcEGIZIypTItjS IFyQ== X-Gm-Message-State: AAQBX9cuAMs7+r3mg9utc0XCB9AdwFoU/KSN4kHzW2o+EqIu0Q0ED3ch eCyVDlhkQ1xPJ+gC7z4Ha9yGagsIT1c9aFM5XXO/Yk0AdlA= X-Google-Smtp-Source: AKy350ZbAUI+E6hesUcfBrz3pezFkqN9+rmcfkNDRdUKhHYERUhEWjpzP2zN0UOXz365FJ1fBUO7SU1EQ60adWdHC+Q= X-Received: by 2002:a17:906:73d8:b0:939:a51a:dc30 with SMTP id n24-20020a17090673d800b00939a51adc30mr2728288ejl.2.1680718806708; Wed, 05 Apr 2023 11:20:06 -0700 (PDT) MIME-Version: 1.0 References: <20230405162144.984598-1-hjl.tools@gmail.com> <20230405162144.984598-4-hjl.tools@gmail.com> In-Reply-To: <20230405162144.984598-4-hjl.tools@gmail.com> From: Noah Goldstein Date: Wed, 5 Apr 2023 13:19:55 -0500 Message-ID: Subject: Re: [PATCH 03/19] : Add LA57 support To: "H.J. Lu" Cc: libc-alpha@sourceware.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Apr 5, 2023 at 11:22=E2=80=AFAM H.J. Lu via Libc-alpha wrote: > > Add 57-bit linear addresses and five-level paging (LA57) support to > . > --- > manual/platform.texi | 3 +++ > sysdeps/x86/bits/platform/x86.h | 2 +- > sysdeps/x86/tst-get-cpu-features.c | 1 + > 3 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/manual/platform.texi b/manual/platform.texi > index c1cef570d2..9251b63e47 100644 > --- a/manual/platform.texi > +++ b/manual/platform.texi > @@ -394,6 +394,9 @@ the indirect branch predictor barrier (IBPB). > @item > @code{L1D_FLUSH} -- IA32_FLUSH_CMD MSR. > > +@item > +@code{LA57} -- 57-bit linear addresses and five-level paging. > + > @item > @code{LAHF64_SAHF64} -- LAHF/SAHF available in 64-bit mode. > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/= x86.h > index 1ed24d7024..c9189fa248 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -182,7 +182,7 @@ enum > x86_cpu_INDEX_7_ECX_13 =3D x86_cpu_index_7_ecx + 13, > x86_cpu_AVX512_VPOPCNTDQ =3D x86_cpu_index_7_ecx + 14, > x86_cpu_INDEX_7_ECX_15 =3D x86_cpu_index_7_ecx + 15, > - x86_cpu_INDEX_7_ECX_16 =3D x86_cpu_index_7_ecx + 16, > + x86_cpu_LA57 =3D x86_cpu_index_7_ecx + 16, > /* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX > instructions in 64-bit mode. */ > x86_cpu_RDPID =3D x86_cpu_index_7_ecx + 22, > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu= -features.c > index 1954698df8..5f5cd3e448 100644 > --- a/sysdeps/x86/tst-get-cpu-features.c > +++ b/sysdeps/x86/tst-get-cpu-features.c > @@ -144,6 +144,7 @@ do_test (void) > CHECK_CPU_FEATURE_PRESENT (AVX512_VNNI); > CHECK_CPU_FEATURE_PRESENT (AVX512_BITALG); > CHECK_CPU_FEATURE_PRESENT (AVX512_VPOPCNTDQ); > + CHECK_CPU_FEATURE_PRESENT (LA57); > CHECK_CPU_FEATURE_PRESENT (RDPID); > CHECK_CPU_FEATURE_PRESENT (KL); > CHECK_CPU_FEATURE_PRESENT (CLDEMOTE); > -- > 2.39.2 > Rename: `#define bit_cpu_INDEX_7_ECX_16` in cpu-features.h?