From: Alistair Francis <alistair23@gmail.com>
To: "Maciej W. Rozycki" <macro@wdc.com>
Cc: Alistair Francis <alistair.francis@wdc.com>,
GNU C Library <libc-alpha@sourceware.org>
Subject: Re: [PATCH v2 10/18] RISC-V: Hard float support for 32-bit
Date: Sun, 12 Jul 2020 08:34:57 -0700 [thread overview]
Message-ID: <CAKmqyKN=xbr1+ECWqV3f2wbc-TeGfKS+csV7oi+NwSz=kndUAQ@mail.gmail.com> (raw)
In-Reply-To: <alpine.LFD.2.21.2007111841310.24175@redsun52.ssa.fujisawa.hgst.com>
On Sat, Jul 11, 2020 at 3:14 PM Maciej W. Rozycki <macro@wdc.com> wrote:
>
> On Sat, 11 Jul 2020, Alistair Francis wrote:
>
> > > Shouldn't we also move the XLEN-agnostic optimised functions to
> > > `sysdeps/riscv/rv{f,d}/' with this change? I think we only need to keep
> > > those that use the `long int' type at the interface in the XLEN-specific
> > > directory.
> >
> > They are all xlen dependent though. All of the 64-bit ones use
> > fcvt.l.d (or something similar) which doesn't exist on RV32.
>
> Umm, right, I missed this detail, sorry for the confusion.
>
> > Although the functions end up being the same, the actual assembly
> > instruction called is different. We can look at consolidating them
> > into a single file and do a xlen/__WORDSIZE macro check.
>
> I don't think there is a simple alternative available for RV32 that would
> be worth keeping together with the RV64 variant. Did I miss anything?
> What instruction(s) do you have in mind?
Something like this for the generic RISC-V lround:
long int
__lroundf (float x)
{
#if __WORDSIZE == 64
int64_t res;
asm ("fcvt.l.s %0, %1, rmm" : "=r" (res) : "f" (x));
#else
int32_t res;
asm ("fcvt.w.s %0, %1, rmm" : "=r" (res) : "f" (x));
#endif
return res;
}
I'm not sure if it's clearer, but for some of the more complex
functions (roundeven for example) it might be easier.
It also means if there is a bug fixed in one it'll end up fixed for both.
>
> > At this stage in glibc development I don't really want to change the
> > floating point helpers. Can we leave this as is and then for the next
> > release I can consolidate all of these into single files that do
> > xlen/__WORDSIZE #ifdefs? That way we will just have a single file (for
> > each operation) for RISC-V that will call a different assembly
> > instruction based on xlen or __WORDSIZE.
>
> Sure, in these circumstances this change is fine with me then.
Great! Thanks
Alistair
>
> Maciej
next prev parent reply other threads:[~2020-07-12 15:44 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 16:25 [PATCH v2 00/18] glibc port for 32-bit RISC-V (RV32) Alistair Francis
2020-06-03 16:25 ` [PATCH v2 01/18] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis
2020-07-07 22:06 ` Maciej W. Rozycki
2020-07-10 15:27 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 02/18] RISC-V: Define __NR_* as __NR_*_time64/64 for 32-bit Alistair Francis
2020-07-08 0:09 ` Maciej W. Rozycki
2020-07-08 17:08 ` Adhemerval Zanella
2020-07-09 17:14 ` Alistair Francis
2020-07-16 0:23 ` Maciej W. Rozycki
2020-07-09 17:10 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 03/18] RISC-V: Add support for 32-bit vDSO calls Alistair Francis
2020-07-08 1:01 ` Maciej W. Rozycki
2020-07-08 18:17 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 04/18] RISC-V: Support dynamic loader for the 32-bit Alistair Francis
2020-07-08 1:35 ` Maciej W. Rozycki
2020-06-03 16:25 ` [PATCH v2 05/18] RISC-V: Add path of library directories " Alistair Francis
2020-07-08 18:42 ` Maciej W. Rozycki
2020-07-09 17:03 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 06/18] RISC-V: Add arch-syscall.h for RV32 Alistair Francis
2020-07-08 19:33 ` Maciej W. Rozycki
2020-06-03 16:25 ` [PATCH v2 07/18] RISC-V: nptl: update default pthread-offsets.h Alistair Francis
2020-07-09 0:14 ` Maciej W. Rozycki
2020-07-09 11:47 ` Adhemerval Zanella
2020-07-15 19:23 ` Maciej W. Rozycki
2020-08-10 17:34 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 08/18] riscv32: Add an architecture ipctypes.h Alistair Francis
2020-07-09 2:46 ` Maciej W. Rozycki
2020-07-09 11:36 ` Adhemerval Zanella
2020-06-03 16:25 ` [PATCH v2 09/18] RISC-V: The ABI implementation for 32-bit Alistair Francis
2020-07-09 23:33 ` Maciej W. Rozycki
2020-07-10 16:45 ` Alistair Francis
2020-07-11 1:24 ` Maciej W. Rozycki
2020-08-10 21:29 ` Alistair Francis
2020-08-27 19:43 ` Adhemerval Zanella
2020-09-25 23:03 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 10/18] RISC-V: Hard float support " Alistair Francis
2020-07-11 0:49 ` Maciej W. Rozycki
2020-07-11 15:49 ` Alistair Francis
2020-07-11 22:13 ` Maciej W. Rozycki
2020-07-12 15:34 ` Alistair Francis [this message]
2020-07-12 22:10 ` Maciej W. Rozycki
2020-08-27 18:36 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 11/18] RISC-V: Add ABI lists Alistair Francis
2020-07-12 20:54 ` Maciej W. Rozycki
2020-07-13 16:14 ` Alistair Francis
2020-06-03 16:25 ` [PATCH v2 12/18] RISC-V: Add the RV32 libm-test-ulps Alistair Francis
2020-06-03 17:34 ` Joseph Myers
2020-06-05 4:01 ` Alistair Francis
2020-06-03 16:26 ` [PATCH v2 13/18] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis
2020-06-03 16:26 ` [PATCH v2 14/18] RISC-V: Build Infastructure for 32-bit Alistair Francis
2020-06-03 16:26 ` [PATCH v2 15/18] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis
2020-06-03 16:26 ` [PATCH v2 16/18] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis
2020-06-03 16:26 ` [PATCH v2 17/18] Documentation for the RISC-V 32-bit port Alistair Francis
2020-06-03 16:26 ` [PATCH v2 18/18] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis
2020-06-15 22:37 ` [PATCH v2 00/18] glibc port for 32-bit RISC-V (RV32) Alistair Francis
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