From: Alistair Francis <alistair23@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: GNU C Library <libc-alpha@sourceware.org>
Subject: Re: [PATCH v5 00/17] glibc port for 32-bit RISC-V (RV32)
Date: Fri, 21 Aug 2020 08:43:36 -0700 [thread overview]
Message-ID: <CAKmqyKNc8wE9HkDed+k4Pfs9kJt+HXqL7QhbcUg=wxWKbU=pOQ@mail.gmail.com> (raw)
In-Reply-To: <cover.1597851293.git.alistair.francis@wdc.com>
On Wed, Aug 19, 2020 at 8:48 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> This patch set contains the glibc port for 32-bit RISC-V.
>
> This is based on the original work from Zong Li [1] and has been
> updated to use a 64-bit time_t.
>
> This requires a 5.4+ kernel and all of the testing has been done using
> the 5.4 stable kernel.
>
> Nothing fails when running ./scripts/build-many-glibcs.py (for all
> targets) on my x86-64 machine.
This series has now been fully reviewed :)
I am planning on pushing it next week unless anyone has any comments
before then. I'll probably wait until after the discussion at Plumbers
in case anything comes up there that should be changed.
Alistair
>
> This is the current list of tests that fail when running inside QEMU RV32
> system emulation on the 5.4 kernel:
>
> FAIL: elf/tst-libc_dlvsym
> FAIL: elf/tst-libc_dlvsym-static
> FAIL: io/tst-lockf
> FAIL: stdlib/tst-strfrom
> FAIL: stdlib/tst-strfrom-locale
>
> ---Links---
> 1: https://sourceware.org/ml/libc-alpha/2018-07/msg00892.html
>
> The latest version of my work can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.next
>
> This specific version can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.5
>
> ---Changelog---
> v5:
> - Small fiexes based on v4 comments
> v4:
> - Address comments on v3
> v3:
> - Re-write the library path detection
> - Drop the ipctypes change
> - Fix comments and code sytle
> - Use __WORDSIZE in replace of __riscv_xlen in places
> - Other changes requested in review
> v2:
> - Rebase on master
> v1:
> - Update based from feedback on RFCv6
> - Improve test passing
> - There are only 9 tests failing now
> - Rebase on Lukasz's work
> - Send only the RV32 specific patches (other patches are already merged
> or on the list)
> RFC v6:
> - Rebase on top of accetpted patches
> - Fix issues so that the tests actually run
> RFC v5:
> - Hopefully finally get the correct layout for the *64 syscalls
> - Sort out the Changelog
> RFC v4:
> - Continue to fix things that weren't working
> - Update the coding style to match glibc
> - Update the __ASSUME_TIME64_SYSCALLS work to better match Lukasz's
> work
> RFC v3:
> - Remove all "Hack" patches
> - Incorporate upstream comments
> - Ensure we don't break RV64
> - Lot's more testing and fixes
> RFC v2:
> - Add Lukasz's patches
> - Update the non HACK syscalls after feedback
> - define __ASSUME_TIME64_SYSCALLS and __ASSUME_RLIM64_SYSCALLS
> - Remove lockf64.c
> - Other smaller changes from RFC v1
>
>
> Alistair Francis (11):
> RISC-V: Use 64-bit time_t and off_t for RV32 and RV64
> RISC-V: Cleanup some of the sysdep.h code
> RISC-V: Use 64-bit-time syscall numbers with the 32-bit port
> RISC-V: Add support for 32-bit vDSO calls
> RISC-V: Add path of library directories for the 32-bit
> RISC-V: Add arch-syscall.h for RV32
> RISC-V: Support the 32-bit ABI implementation
> RISC-V: Add 32-bit ABI lists
> RISC-V: Add the RV32 libm-test-ulps
> riscv32: Specify the arch_minimum_kernel as 5.4
> Documentation for the RISC-V 32-bit port
>
> Zong Li (6):
> RISC-V: Support dynamic loader for the 32-bit
> RISC-V: Add hard float support for 32-bit CPUs
> RISC-V: Fix llrint and llround missing exceptions on RV32
> RISC-V: Add rv32 path to RTLDLIST in ldd
> RISC-V: Build infastructure for 32-bit port
> Add RISC-V 32-bit target to build-many-glibcs.py
>
> NEWS | 11 +-
> README | 1 +
> scripts/build-many-glibcs.py | 15 +
> sysdeps/riscv/bits/wordsize.h | 9 +-
> sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 26 +-
> sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 +-
> sysdeps/riscv/nptl/pthread-offsets.h | 17 +-
> sysdeps/riscv/preconfigure | 6 +-
> sysdeps/riscv/rv32/Implies-after | 1 +
> .../riscv/rv32/fix-fp-int-convert-overflow.h | 38 +
> sysdeps/riscv/rv32/rvd/Implies | 3 +
> sysdeps/riscv/rv32/rvd/libm-test-ulps | 1405 ++++++++++++
> sysdeps/riscv/rv32/rvd/libm-test-ulps-name | 1 +
> sysdeps/riscv/rv32/rvd/s_lrint.c | 31 +
> sysdeps/riscv/rv32/rvd/s_lround.c | 31 +
> sysdeps/riscv/rv32/rvf/Implies | 1 +
> sysdeps/riscv/rv32/rvf/s_lrintf.c | 31 +
> sysdeps/riscv/rv32/rvf/s_lroundf.c | 31 +
> sysdeps/riscv/sfp-machine.h | 27 +-
> sysdeps/riscv/sys/asm.h | 7 +-
> sysdeps/unix/sysv/linux/riscv/Makefile | 8 +-
> .../unix/sysv/linux/riscv/bits/environments.h | 81 +
> sysdeps/unix/sysv/linux/riscv/bits/time64.h | 36 +
> sysdeps/unix/sysv/linux/riscv/bits/timesize.h | 22 +
> sysdeps/unix/sysv/linux/riscv/configure | 43 +
> sysdeps/unix/sysv/linux/riscv/configure.ac | 12 +
> sysdeps/unix/sysv/linux/riscv/dl-cache.h | 54 +-
> .../unix/sysv/linux/riscv/jmp_buf-macros.h | 55 +
> sysdeps/unix/sysv/linux/riscv/kernel_stat.h | 23 +
> sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +-
> sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed | 2 +-
> sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 +
> .../unix/sysv/linux/riscv/rv32/arch-syscall.h | 284 +++
> .../unix/sysv/linux/riscv/rv32/c++-types.data | 67 +
> sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist | 5 +
> .../linux/riscv/rv32/libBrokenLocale.abilist | 1 +
> .../unix/sysv/linux/riscv/rv32/libanl.abilist | 4 +
> .../unix/sysv/linux/riscv/rv32/libc.abilist | 1935 +++++++++++++++++
> .../sysv/linux/riscv/rv32/libcrypt.abilist | 2 +
> .../unix/sysv/linux/riscv/rv32/libdl.abilist | 9 +
> .../unix/sysv/linux/riscv/rv32/libm.abilist | 940 ++++++++
> .../sysv/linux/riscv/rv32/libpthread.abilist | 213 ++
> .../sysv/linux/riscv/rv32/libresolv.abilist | 79 +
> .../unix/sysv/linux/riscv/rv32/librt.abilist | 35 +
> .../linux/riscv/rv32/libthread_db.abilist | 40 +
> .../sysv/linux/riscv/rv32/libutil.abilist | 6 +
> sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 +-
> sysdeps/unix/sysv/linux/riscv/sysdep.h | 59 +-
> 48 files changed, 5681 insertions(+), 68 deletions(-)
> create mode 100644 sysdeps/riscv/rv32/Implies-after
> create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h
> create mode 100644 sysdeps/riscv/rv32/rvd/Implies
> create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps
> create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps-name
> create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c
> create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c
> create mode 100644 sysdeps/riscv/rv32/rvf/Implies
> create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c
> create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c
> create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/environments.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/time64.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/timesize.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/kernel_stat.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/arch-syscall.h
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist
> create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist
>
> --
> 2.28.0
>
prev parent reply other threads:[~2020-08-21 15:54 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-19 15:38 Alistair Francis
2020-08-19 15:38 ` [PATCH v5 01/17] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis
2020-08-19 15:38 ` [PATCH v5 02/17] RISC-V: Cleanup some of the sysdep.h code Alistair Francis
2020-08-20 21:35 ` Maciej W. Rozycki
2020-08-19 15:38 ` [PATCH v5 03/17] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port Alistair Francis
2020-08-20 21:39 ` Maciej W. Rozycki
2020-08-19 15:38 ` [PATCH v5 04/17] RISC-V: Add support for 32-bit vDSO calls Alistair Francis
2020-08-19 15:38 ` [PATCH v5 05/17] RISC-V: Support dynamic loader for the 32-bit Alistair Francis
2020-08-19 15:38 ` [PATCH v5 06/17] RISC-V: Add path of library directories " Alistair Francis
2020-08-21 11:16 ` Maciej W. Rozycki
2020-08-19 15:38 ` [PATCH v5 07/17] RISC-V: Add arch-syscall.h for RV32 Alistair Francis
2020-08-19 15:38 ` [PATCH v5 08/17] RISC-V: Support the 32-bit ABI implementation Alistair Francis
2020-08-21 11:21 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 09/17] RISC-V: Add hard float support for 32-bit CPUs Alistair Francis
2020-08-21 11:23 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 10/17] RISC-V: Add 32-bit ABI lists Alistair Francis
2020-08-21 11:32 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 11/17] RISC-V: Add the RV32 libm-test-ulps Alistair Francis
2020-08-19 15:39 ` [PATCH v5 12/17] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis
2020-08-21 11:36 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 13/17] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis
2020-08-21 11:38 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 14/17] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis
2020-08-21 11:43 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 15/17] RISC-V: Build infastructure for 32-bit port Alistair Francis
2020-08-21 11:59 ` Maciej W. Rozycki
2020-08-21 15:22 ` Alistair Francis
2020-08-19 15:39 ` [PATCH v5 16/17] Documentation for the RISC-V " Alistair Francis
2020-08-21 11:59 ` Maciej W. Rozycki
2020-08-19 15:39 ` [PATCH v5 17/17] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis
2020-08-20 13:11 ` [PATCH v5 00/17] glibc port for 32-bit RISC-V (RV32) Maciej W. Rozycki
2020-08-21 15:25 ` Alistair Francis
2020-08-22 13:04 ` Maciej W. Rozycki
2020-08-22 13:44 ` Andreas Schwab
2020-08-24 17:18 ` Alistair Francis
2020-08-24 18:17 ` Maciej W. Rozycki
2020-08-25 18:15 ` Alistair Francis
2020-08-26 16:06 ` Maciej W. Rozycki
2020-08-26 1:15 ` Nelson Chu
2020-08-26 15:43 ` Alistair Francis
2020-08-29 21:41 ` Maciej W. Rozycki
2020-08-28 18:19 ` Joseph Myers
2020-08-24 22:41 ` Joseph Myers
2020-08-25 18:20 ` Alistair Francis
2020-08-20 22:37 ` Alistair Francis
2020-08-21 15:43 ` Alistair Francis [this message]
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