From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by sourceware.org (Postfix) with ESMTPS id 61C023858C41 for ; Tue, 8 Aug 2023 00:01:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 61C023858C41 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-4fe1b00fce2so7953658e87.3 for ; Mon, 07 Aug 2023 17:01:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1691452904; x=1692057704; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=AV+DBcbUhpN2SGBpABDOA96repcy5NOynIjlyh/bLO0=; b=s+VTrsOpNdcvmiRj6N0148ku4i7Di4L+0hpAp8rUvyDDr/ADQh6EtFrynCmMSabCCq AbzvGTwd+wi0JnQibggijxj4yFRlUB+Be/mRo3y/m6XO7SsKTdb4FU3mmCFz4U2fs4oo CEJa2+CQh3uZx1wT7E7U0utt7VdRHgVeF1xTzAObM/0VTMpyR13n8oCodqi+ibgSP1Qj uReDn6aBnWwbTy30yvVkaverJTS0F6omg4DlgQDQUnsRSGm5/HCQhsl5X0CZt5jGjoK4 0OlA/tbb5ePdfNpUNjvnkuxqSTCeDyYY8suSLbu2p2q5/GuxlOHmJ/QJGUHSdlvqYoRs fT8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691452904; x=1692057704; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AV+DBcbUhpN2SGBpABDOA96repcy5NOynIjlyh/bLO0=; b=LwiFeB5QCay1GQ1olPWcpA59AgPcsiiSzlwaDjTyQrrd8GGohWL0QdE9J0aanh24nu b51W+PKbSSuazqtSw/Z5NDx0AFwBB3eRPRKg8cw/mRYYOCpCpHUTDrWIv9GIiBa4YpDm B9dvpIfMhb2efpRxpk6Mwg3clF+32QA2nH88dHGBwfmm/FYrboWOofHD75HRPn805W5e v6zWYaykjE7IF6JQWZqa9H4IOpiCxW8ZQU9VsnkdZjVlff6l+yNOZa8g2fKm00YmqPlZ vnz/xa6y/A5vi2ti8sdmyC1jmJgh1IjUi4wE/xG6kRbU1r3LbgHxMM34kB6+NF6uNzC/ Kt7g== X-Gm-Message-State: AOJu0YwAvmVNZ/q8j6e96ps7mBeekIyY285SdLvKEVZteHFb/I4FAzAz WaHzCSwe/t9S/XF3h6p2qzO2r4HCsMT0sCRzI2OPUQ== X-Google-Smtp-Source: AGHT+IESMhgFsa+O+V7GDjwIj4p1FDsRhs2/MG+T+cp6sADya311t5FNTyoq5a2AxQR5pXt7vv/QgYQlfnbD/ce+H0A= X-Received: by 2002:a05:6512:1c7:b0:4fd:c84f:30d4 with SMTP id f7-20020a05651201c700b004fdc84f30d4mr7189385lfp.36.1691452903887; Mon, 07 Aug 2023 17:01:43 -0700 (PDT) MIME-Version: 1.0 References: <20230802155903.2552780-1-evan@rivosinc.com> <20230802155903.2552780-6-evan@rivosinc.com> <87il9w37vi.fsf@oldenburg.str.redhat.com> <6f0911c6-b24b-444c-4b4b-a62e49a51734@linaro.org> <548fc7d5-6225-69e7-f4a7-47669d2fdbd5@linaro.org> In-Reply-To: From: Evan Green Date: Mon, 7 Aug 2023 17:01:07 -0700 Message-ID: Subject: Re: [PATCH v6 5/5] riscv: Add and use alignment-ignorant memcpy To: enh Cc: Richard Henderson , Florian Weimer , libc-alpha@sourceware.org, slewis@rivosinc.com, palmer@rivosinc.com, vineetg@rivosinc.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Aug 7, 2023 at 3:48=E2=80=AFPM enh wrote: > > On Mon, Aug 7, 2023 at 3:11=E2=80=AFPM Evan Green wro= te: > > > > On Thu, Aug 3, 2023 at 3:30=E2=80=AFPM Richard Henderson > > wrote: > > > > > > On 8/3/23 11:42, Evan Green wrote: > > > > On Thu, Aug 3, 2023 at 10:50=E2=80=AFAM Richard Henderson > > > > wrote: > > > >> Outside libc something is required. > > > >> > > > >> An extra parameter to ifunc is surprising though, and clearly not = ideal per the extra > > > >> hoops above. I would hope for something with hidden visibility in= libc_nonshared.a that > > > >> could always be called directly. > > > > > > > > My previous spin took that approach, defining a > > > > __riscv_hwprobe_early() in libc_nonshared that could route to the r= eal > > > > function if available, or make the syscall directly if not. But tha= t > > > > approach had the drawback that ifunc users couldn't take advantage = of > > > > the vDSO, and then all users had to comprehend the difference betwe= en > > > > __riscv_hwprobe() and __riscv_hwprobe_early(). > > > > > > I would define __riscv_hwprobe such that it could take advantage of t= he vDSO once > > > initialization reaches a certain point, but cope with being run earli= er than that point by > > > falling back to the syscall. > > > > > > That constrains the implementation, I guess, in that it can't set err= no, but just > > > returning the negative errno from the syscall seems fine. > > > > > > It might be tricky to get a reference to GLRO(dl_vdso_riscv_hwprobe) = very early, but I > > > would hope that some application of __attribute__((weak)) might corre= ctly get you a NULL > > > prior to full relocations being complete. > > > > Right, this is what we had in the previous iteration of this series, > > and it did work ok. But it wasn't as good since it meant ifunc > > selectors always got stuck in the null/fallback case and were forced > > to make the syscall. With this mechanism they get to take advantage of > > the vDSO. > > > > > > > > > > > > In contrast, IMO this approach is much nicer. Ifunc writers are > > > > already used to getting hwcap info via a parameter. Adding this sec= ond > > > > parameter, which also provides hwcap-like things, seems like a natu= ral > > > > extension. I didn't quite follow what you meant by the "extra hoops > > > > above". > > > > > > The check for null function pointer, for sure. But also consider how= __riscv_hwprobe is > > > going to be used. > > > > > > It might be worth defining some helper functions for probing a single= key or a single > > > field. E.g. > > > > > > uint64_t __riscv_hwprobe_one_key(int64_t key, unsigned int flags) > > > { > > > struct riscv_hwprobe pair =3D { .key =3D key }; > > > int err =3D __riscv_hwprobe(&pair, 1, 0, NULL, flags); > > > if (err) > > > return err; > > > if (pair.key =3D=3D -1) > > > return -ENOENT; > > > return pair.value; > > > } > > > > > > This implementation requires that no future hwprobe key define a valu= e which as a valid > > > value in the errno range (or better, bit 63 unused). Alternately, or= additionally: > > > > > > bool __riscv_hwprobe_one_mask(int64_t key, uint64_t mask, uint64_t va= l, int flags) > > > { > > > struct riscv_hwprobe pair =3D { .key =3D key }; > > > return (__riscv_hwprobe(&pair, 1, 0, NULL, flags) =3D=3D 0 > > > && pair.key !=3D -1 > > > && (pair.value & mask) =3D=3D val); > > > } > > > > > > These yield either > > > > > > int64_t v =3D __riscv_hwprobe_one_key(CPUPERF_0, 0); > > > if (v >=3D 0 && (v & MISALIGNED_MASK) =3D=3D MISALIGNED_FAST) > > > return __memcpy_noalignment; > > > return __memcpy_generic; > > > > > > or > > > > > > if (__riscv_hwprobe_one_mask(CPUPERF_0, MISALIGNED_MASK, MISALIG= NED_FAST, 0)) > > > return __memcpy_noalignment; > > > return __memcpy_generic; > > > > > > which to my mind looks much better for a pattern you'll be replicatin= g so very many times > > > across all of the ifunc implementations in the system. > > > > Ah, I see. I could make a static inline function in the header that > > looks something like this (mangled by gmail, sorry): > > > > /* Helper function usable from ifunc selectors that probes a single key= . */ > > static inline int __riscv_hwprobe_one(__riscv_hwprobe_t hwprobe_func, > > signed long long int key, > > unsigned long long int *value) > > { > > struct riscv_hwprobe pair; > > int rc; > > > > if (!hwprobe_func) > > return -ENOSYS; > > > > pair.key =3D key; > > rc =3D hwprobe_func(&pair, 1, 0, NULL, 0); > > if (rc) { > > return rc; > > } > > > > if (pair.key < 0) { > > return -ENOENT; > > } > > > > *value =3D pair.value; > > return 0; > > } > > > > The ifunc selector would then be significantly cleaned up, looking > > something like: > > > > if (__riscv_hwprobe_one(hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &val= ue)) > > return __memcpy_generic; > > > > if (value & RISCV_HWPROBE_MISALIGNED_MASK) =3D=3D RISCV_HWPROBE_MISALIG= NED_FAST) > > return __memcpy_noalignment; > > (Android's libc maintainer here, having joined the list just to talk > about risc-v ifuncs :-) ) > > has anyone thought about calling ifunc resolvers more like this... > > --same part of the dynamic loader that caches the two getauxval()s for ar= m64-- > static struct riscv_hwprobe probes[] =3D { > {.value =3D RISCV_HWPROBE_KEY_MVENDORID}, > {.value =3D RISCV_HWPROBE_KEY_MARCHID}, > {.value =3D RISCV_HWPROBE_KEY_MIMPID}, > {.value =3D RISCV_HWPROBE_KEY_BASE_BEHAVIOR}, > {.value =3D RISCV_HWPROBE_KEY_IMA_EXT}, > {.value =3D RISCV_HWPROBE_KEY_CPUPERF_0}, > ... // every time a new key is added to the kernel, we add it here > }; > __riscv_hwprobe(...); // called once > > --part of the dynamic loader that calls ifunc resolvers-- > (*ifunc_resolver)(sizeof(probes)/sizeof(probes[0]), probes); > > this is similar to what we already have for arm64 (where there's a > getauxval(AT_HWCAP) and a pointer to a struct for AT_HWCAP2 and > potentially others), but more uniform, and avoiding the source > (in)compatibility issues of adding new fields to a struct [even if it > does have a size_t to "version" it like the arm64 ifunc struct]. > > yes, it means everyone pays to get all the hwprobes, but that gets > amortized. and lookup in the ifunc resolver is simple and quick. if we > know that the keys will be kept dense, we can even have code in ifunc > resolvers like > > if (probes[RISCV_HWPROBE_BASE_BEHAVIOR_IMA].value & RISCV_HWPROBE_IMA_V) = ... > > though personally for the "big ticket items" that get a letter to > themselves like V, i'd be tempted to pass `(getauxval(AT_HWCAP), > probe_count, probes_ptr)` to the resolver, but i hear that's > controversial :-) Hello, welcome to the fun! :) What you're describing here is almost exactly what we did inside the vDSO function. The vDSO function acts as a front for a handful of probe values that we've already completed and cached in userspace. We opted to make it a function, rather than exposing the data itself via vDSO, so that we had future flexibility in what elements we cached in userspace and their storage format. We can update the kernel as needed to cache the hottest things in userspace, even if that means rearranging the data format, passing through some extra information, or adding an extra snip of code. My hope is callers can directly interact with the vDSO function (though maybe as Richard suggested maybe with the help of a tidy inline helper), rather than trying to add a second layer of userspace caching. -Evan