From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb32.google.com (mail-yb1-xb32.google.com [IPv6:2607:f8b0:4864:20::b32]) by sourceware.org (Postfix) with ESMTPS id 7B1213858D32; Sun, 11 Sep 2022 20:19:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7B1213858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-yb1-xb32.google.com with SMTP id f131so9966040ybf.7; Sun, 11 Sep 2022 13:19:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=F3wkqOKBap3N/IaQnYNYdIqMeNhbIRMgK84Ck0T3YVw=; b=o8zyUquDSwE3Gf5fYyr+lKUAH7hNoX9WqI54mHS1I7rnAA3zgrcNX+TXfZjWr5CfoV Tb1iWuk5LehpyMeUfdwWhwAiyLy0PY8SGjaLJ3COq00cw4U2kdPEsESh0zPtE/MTjzAG OrTlKGvZ4lEnTJ50sXQGZYI8q1GjMPx6428kipfJyrNWgE7+Z1C3Png2KN0dkBtMQOWS 9oHosD5lqjqwKLsSGQoudP0ksplkujCERyGLBDvl1WNAVC9zmLzSnshlxP5jQxznFlgN hfXSW2P0Esh3Xal/pApRU476ems3WZ52sd4c70t1WjM2pZO3cIYBPuYTAbgTS9VnSknD O52Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=F3wkqOKBap3N/IaQnYNYdIqMeNhbIRMgK84Ck0T3YVw=; b=m/ICYWQu3rZPlPlrUwrRQR7A3Q69iC7PhzsWoOgtp2uEqkIUtN86tquhlzKqh5tg9e 66bQWR6jbMOTom6WGKOqsM0S89UJeb5qloLHpDqqdednOFl+QTmlJaLyECTNdGkwthE6 eVtLKCOcJbu2YzBS8qfqDY7pxvT1wEeXiVpZGmAbhpBBjZI4vCzs0w7Jf5idRp1wCRMS W+i0MUjK6kSPAJErwnexfSJLWuP9MY9U53EhrX79CDr6bHajfYKb27vvvkMtsDZUVD7T hRfz4WMK54t/0F8eXjiExEgTBnCJyv8kvXuVPmCzzhW+mYWxKmfp3THuDRyae5hks5j1 Ifnw== X-Gm-Message-State: ACgBeo34aScEBwv1r9BI6UN58cjsPCtfzXe5GRElq/zYIFumhw9mkvzL rztTzHv9b1ad6mnbFtrqJ7BNs1Rdm23pmsj4JDU= X-Google-Smtp-Source: AA6agR6/Yf4lrVCOpm40DR1roYz6JLco6Sp6T6w7Z8IJjPwGcaER7J+mfMcap/vdQOe/edydQjUbRcTQeePHA6BIdE8= X-Received: by 2002:a25:424f:0:b0:6ac:9f04:5cf with SMTP id p76-20020a25424f000000b006ac9f0405cfmr18218578yba.60.1662927590902; Sun, 11 Sep 2022 13:19:50 -0700 (PDT) MIME-Version: 1.0 References: <20211111162428.2286605-1-hjl.tools@gmail.com> <20211111162428.2286605-2-hjl.tools@gmail.com> <924a80cd-202c-99e9-a2d9-1aeda2235b83@linux.intel.com> In-Reply-To: <924a80cd-202c-99e9-a2d9-1aeda2235b83@linux.intel.com> From: Sunil Pandey Date: Sun, 11 Sep 2022 13:19:15 -0700 Message-ID: Subject: Re: [PATCH v6 1/4] Add LLL_MUTEX_READ_LOCK [BZ #28537] To: Arjan van de Ven , Libc-stable Mailing List Cc: "H.J. Lu" , Noah Goldstein , Florian Weimer , Andreas Schwab , GNU C Library , "Paul A . Clarke" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,HK_RANDOM_ENVFROM,HK_RANDOM_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Nov 17, 2021 at 5:17 PM Arjan van de Ven via Libc-alpha wrote: > > On 11/17/2021 4:31 PM, H.J. Lu wrote: > >> Yes, but the loop will be able to run `max_cnt` iterations much faster now. > >> Just wondering if the value needs to be re-tuned. Not that is necessarily needs > >> to be. > > Maybe if we can find some data to show for. > > > > wondering when this was last tuned.. I assume todays CPUs and CPUs from, say, 5 or 10 years ago > have an order of magnitude different performance in this regard.... > if there wasn't a need to retune during that, maybe this value is so robust that it doesn't need > retuning. > > or maybe it's time to retune this in general sometime soon after this patch goes in ;) I would like to backport this patch to release branch 2.33 and 2.34 Any comments/suggestions or objections on this. commit d672a98a1af106bd68deb15576710cd61363f7a6 Author: H.J. Lu Date: Tue Nov 2 18:33:07 2021 -0700 Add LLL_MUTEX_READ_LOCK [BZ #28537] CAS instruction is expensive. From the x86 CPU's point of view, getting a cache line for writing is more expensive than reading. See Appendix A.2 Spinlock in: https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf