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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Noah Goldstein <goldstein.w.n@gmail.com>
Cc: GNU C Library <libc-alpha@sourceware.org>,
	"Carlos O'Donell" <carlos@systemhalted.org>
Subject: Re: [PATCH v6 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2
Date: Sun, 3 Jul 2022 11:00:26 -0700	[thread overview]
Message-ID: <CAMe9rOo5E_tdpPFh=gt3izi4Mg_VwS5Ji8MAVFp2DavqVsYX-w@mail.gmail.com> (raw)
In-Reply-To: <CAFUsyfKkuEjt9Oq+W6xO5Y2wC9482tYe1FvHbiLTnR8Zd7O8nw@mail.gmail.com>

On Fri, Jul 1, 2022 at 3:52 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Fri, Jul 1, 2022 at 3:38 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> >
> > On Thu, Jun 30, 2022 at 5:01 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> > >
> > > On Thu, Jun 30, 2022 at 5:01 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> > > >
> > > > On Thu, Jun 30, 2022 at 4:20 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > > > >
> > > > > On Thu, Jun 30, 2022 at 1:13 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> > > > > >
> > > > > > Just for clarities sake and so that if a future implementation is
> > > > > > added we remember to add the check.
> > > > > > ---
> > > > > >  sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 4 ++++
> > > > > >  1 file changed, 4 insertions(+)
> > > > > >
> > > > > > diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > > > > > index ee36525bcf..752798278c 100644
> > > > > > --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > > > > > +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
> > > > > > @@ -27,6 +27,10 @@ IFUNC_SELECTOR (void)
> > > > > >  {
> > > > > >    const struct cpu_features* cpu_features = __get_cpu_features ();
> > > > > >
> > > > > > +  /* This function uses slow sse4.2 instructions (pcmpstri) but since
> > > > > > +     there is no other optimized implementation keep using it.  If an
> > > > > > +     optimized fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P
> > > > > > +     (cpu_features, Slow_SSE4_2) check.  */
> > > > >
> > > > > This function always uses sse4.2 instructions (pcmpstri) since there
> > > > > is no other optimized implementation.  If an ...
>
> Then always uses slow sse4.2...

SSE4.2 isn't always slow.

> Also I think there needs to be a 'but' before since otherwise the sentence
> sounds like it's saying the function uses sse4.2 because there are no
> other implementations.

because there are no other "optimized" implementations.

> > > >
> > > > Is it all sse4.2 instructions that count for Slow_SSE4.2 or other the
> > > > microcode string ones?
> > > other->only*
> >
> > No.  Only the string instructions are slow.
> >
> > > > >
> > > > > >    if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
> > > > > >      return OPTIMIZE (sse42);
> > > > > >
> > > > > > --
> > > > > > 2.34.1
> > > > > >
> > > > >
> > > > >
> > > > > --
> > > > > H.J.
> >
> >
> >
> > --
> > H.J.



-- 
H.J.

  reply	other threads:[~2022-07-03 18:01 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 15:27 [PATCH v1 " Noah Goldstein
2022-06-28 15:27 ` [PATCH v1 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-06-29 19:20   ` H.J. Lu
2022-06-29 22:07     ` Noah Goldstein
2022-06-29 18:53 ` [PATCH v1 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 H.J. Lu
2022-06-29 19:19   ` Noah Goldstein
2022-06-29 22:06     ` Noah Goldstein
2022-06-29 22:05 ` [PATCH v2 " Noah Goldstein
2022-06-29 22:05   ` [PATCH v2 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-06-29 22:15     ` H.J. Lu
2022-06-30  3:11       ` Noah Goldstein
2022-06-30  3:27         ` Noah Goldstein
2022-06-29 22:12   ` [PATCH v2 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 H.J. Lu
2022-06-30  3:09     ` Noah Goldstein
2022-06-30  3:08 ` [PATCH v4 1/2] x86: Add missing IS_IN (libc) check to strncmp-sse4_2.S Noah Goldstein
2022-06-30  3:08   ` [PATCH v4 2/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 Noah Goldstein
2022-06-30  3:10   ` [PATCH v4 1/2] x86: Add missing IS_IN (libc) check to strncmp-sse4_2.S Noah Goldstein
2022-06-30  3:10 ` [PATCH v5 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 Noah Goldstein
2022-06-30  3:10   ` [PATCH v5 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-06-30  3:44 ` [PATCH v6 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 Noah Goldstein
2022-06-30  3:44   ` [PATCH v6 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-06-30  7:47   ` [PATCH v6 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 Andreas Schwab
2022-06-30 20:13     ` Noah Goldstein
2022-06-30 20:13 ` Noah Goldstein
2022-06-30 20:13   ` [PATCH v6 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-07-01 22:35     ` H.J. Lu
2022-06-30 23:20   ` [PATCH v6 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 H.J. Lu
2022-07-01  0:01     ` Noah Goldstein
2022-07-01  0:01       ` Noah Goldstein
2022-07-01 22:38         ` H.J. Lu
2022-07-01 22:52           ` Noah Goldstein
2022-07-03 18:00             ` H.J. Lu [this message]
2022-07-04  4:28               ` Noah Goldstein
2022-07-04  4:28 ` [PATCH v7 " Noah Goldstein
2022-07-04  4:28   ` [PATCH v7 2/2] x86: Add support for building str{c|p}{brk|spn} with explicit ISA level Noah Goldstein
2022-07-05 15:41   ` [PATCH v7 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 H.J. Lu

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