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Lu" Date: Mon, 12 Feb 2024 07:56:46 -0800 Message-ID: Subject: Re: [PATCH v3 3/3] x86: Expand the comment on when REP STOSB is used on memset To: Adhemerval Zanella Cc: libc-alpha@sourceware.org, Noah Goldstein , Sajan Karumanchi , bmerry@sarao.ac.za, pmallapp@amd.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3020.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Feb 8, 2024 at 5:08=E2=80=AFAM Adhemerval Zanella wrote: > > --- > sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysde= ps/x86_64/multiarch/memset-vec-unaligned-erms.S > index 9984c3ca0f..97839a2248 100644 > --- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S > +++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S > @@ -21,7 +21,9 @@ > 2. If size is less than VEC, use integer register stores. > 3. If size is from VEC_SIZE to 2 * VEC_SIZE, use 2 VEC stores. > 4. If size is from 2 * VEC_SIZE to 4 * VEC_SIZE, use 4 VEC stores. > - 5. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with > + 5. On machines ERMS feature, if size is greater or equal than > + __x86_rep_stosb_threshold then REP STOSB will be used. > + 6. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with > 4 VEC stores and store 4 * VEC at a time until done. */ > > #include > -- > 2.34.1 > LGTM. Reviewed-by: H.J. Lu Thanks. --=20 H.J.