From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by sourceware.org (Postfix) with ESMTPS id 2024B3983062 for ; Thu, 15 Jul 2021 12:40:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2024B3983062 Received: by mail-pj1-x1029.google.com with SMTP id h1-20020a17090a3d01b0290172d33bb8bcso6159031pjc.0 for ; Thu, 15 Jul 2021 05:40:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ROob6OzKuhlH0Lg1UoV6G/oM3jxIEGfHEqkPn+WcrfA=; b=djAuxhji2uYIwh4n1vGRaSOz/IZq16bfQ+QpAQ5blxMi1IlRBC/B9HDRfw6C6Upi3K e2MeUJ7xroAqw1QXjOiIGgyoesx87CViLl9mSp7g4bGulXFL88/NeTc4WirsvTXzGTT9 FkRK5QUaLf3OBOFDvXq4h+xTnXODhNyk2v4o9QWazc+kh0H0szkRTU2JgYQ+2B/XxjyG iUnw4fE6BoCPWCpQDvL7YfvVGly5bBNkfgb4PId0hgkRiOgSyfR+Nw+zWakdaKRWE3M3 /0JtiePZ0FJObj6IatHre1rW9v84iNNycyUg5N94eammPaTtc0sTXmrmS9nV68Moel2S szTA== X-Gm-Message-State: AOAM531UTnvRNgkuEOFAUaxZCO9rryKuAi3no4iDmo+RAP6zX7PklU+8 ViQjacm9ndkY3iwO3uoAlT5sbXbVBk/kgqFGb5A= X-Google-Smtp-Source: ABdhPJzNWKR29OuCLqoZjPCb+Jn69tM5iYcePub1N0PJJAPguVzLnbbQlZ98h3V1ckgr0BeXQztI0b4eGdbDNkZdkyM= X-Received: by 2002:a17:90a:6be6:: with SMTP id w93mr4283583pjj.154.1626352804258; Thu, 15 Jul 2021 05:40:04 -0700 (PDT) MIME-Version: 1.0 References: <20210715115804.4192826-1-adhemerval.zanella@linaro.org> In-Reply-To: <20210715115804.4192826-1-adhemerval.zanella@linaro.org> From: "H.J. Lu" Date: Thu, 15 Jul 2021 05:39:28 -0700 Message-ID: Subject: Re: [PATCH] elf: Fix tst-cpu-features-cpuinfo on some ADM systems (BZ #28090) To: Adhemerval Zanella Cc: GNU C Library Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3031.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Jul 2021 12:40:06 -0000 On Thu, Jul 15, 2021 at 5:00 AM Adhemerval Zanella via Libc-alpha wrote: > > The SSBD feature is implemented in 2 different ways on AMD processors: > newer systems (Zen3) provides AMD_SSBD (function 8000_0008, EBX[24]), > while older system provides AMD_VIRT_SSBD (function 8000_0008, EBX[25]). > However for AMD_VIRT_SSBD, kernel shows both 'ssdb' and 'virt_ssdb' on > /proc/cpuinfo; while for AMD_SSBD only 'ssdb' is provided. > > This now check is AMD_SSBD is set to check for 'ssbd', otherwise check > if AMD_VIRT_SSDB is set to check for 'virt_ssdb'. > > Checked on x86_64-linux-gnu on a Ryzen 9 5900x. > --- > sysdeps/x86/bits/platform/x86.h | 1 + > sysdeps/x86/include/cpu-features.h | 3 +++ > sysdeps/x86/tst-cpu-features-cpuinfo.c | 13 ++++++++++++- > 3 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h > index 5509b1ad87..2b257606b2 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -282,6 +282,7 @@ enum > x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14, > x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15, > x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24, > + x86_cpu_AMD_VIRT_SSBD = x86_cpu_index_80000008_ebx + 25, > > x86_cpu_index_7_ecx_1_eax > = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int) > diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h > index 59e01df543..a3f11baa7a 100644 > --- a/sysdeps/x86/include/cpu-features.h > +++ b/sysdeps/x86/include/cpu-features.h > @@ -293,6 +293,7 @@ enum > #define bit_cpu_AMD_IBRS (1u << 14) > #define bit_cpu_AMD_STIBP (1u << 15) > #define bit_cpu_AMD_SSBD (1u << 24) > +#define bit_cpu_AMD_VIRT_SSBD (1u << 25) > > /* CPUID_INDEX_7_ECX_1. */ > > @@ -527,6 +528,7 @@ enum > #define index_cpu_AMD_IBRS CPUID_INDEX_80000008 > #define index_cpu_AMD_STIBP CPUID_INDEX_80000008 > #define index_cpu_AMD_SSBD CPUID_INDEX_80000008 > +#define index_cpu_AMD_VIRT_SSBD CPUID_INDEX_80000008 > > /* CPUID_INDEX_7_ECX_1. */ > > @@ -761,6 +763,7 @@ enum > #define reg_AMD_IBRS ebx > #define reg_AMD_STIBP ebx > #define reg_AMD_SSBD ebx > +#define reg_AMD_VIRT_SSBD ebx > > /* CPUID_INDEX_7_ECX_1. */ > > diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c > index f457e8677b..9d4ae65e26 100644 > --- a/sysdeps/x86/tst-cpu-features-cpuinfo.c > +++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c > @@ -236,7 +236,18 @@ do_test (int argc, char **argv) > if (cpu_features->basic.kind == arch_kind_intel) > fails += CHECK_PROC (ssbd, SSBD); > else if (cpu_features->basic.kind == arch_kind_amd) > - fails += CHECK_PROC (ssbd, AMD_SSBD); > + { > + /* This feature is implemented in 2 different ways on AMD processors: > + newer systems provides AMD_SSBD (function 8000_0008, EBX[24]), > + while older system proviseds AMD_VIRT_SSBD (function 8000_008, > + EBX[25]). However for AMD_VIRT_SSBD, kernel shows both 'ssdb' > + and 'virt_ssdb' on /proc/cpuinfo; while for AMD_SSBD only 'ssdb' > + is provided. */ > + if (HAS_CPU_FEATURE (AMD_SSBD)) > + fails += CHECK_PROC (ssbd, AMD_SSBD); > + else if (HAS_CPU_FEATURE (AMD_VIRT_SSBD)) > + fails += CHECK_PROC (virt_ssbd, AMD_VIRT_SSBD); > + } > fails += CHECK_PROC (sse, SSE); > fails += CHECK_PROC (sse2, SSE2); > fails += CHECK_PROC (pni, SSE3); > -- > 2.30.2 > Please fix the commit subject. It should be AMD, not ADM. Otherwise LGTM. Reviewed-by: H.J. Lu Thanks. -- H.J.