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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Florian Weimer <fweimer@redhat.com>,
	 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	 "Shanbhogue, Vedvyas" <vedvyas.shanbhogue@intel.com>
Cc: "H.J. Lu via Libc-alpha" <libc-alpha@sourceware.org>,
	Joseph Myers <joseph@codesourcery.com>
Subject: Re: [RFC] <sys/tagged-address.h>: An API for tagged address
Date: Wed, 17 Feb 2021 13:58:36 -0800	[thread overview]
Message-ID: <CAMe9rOpfKbaaVoeu=UJP4vMwqFn1CPtLO=8Lb9jHrJY_rkqSfg@mail.gmail.com> (raw)
In-Reply-To: <CAMe9rOrwtyuiEq+a+81wFhmMLBzYhjQOrjkCCmKqgESY=kd4Rg@mail.gmail.com>

On Wed, Feb 17, 2021 at 10:43 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Fri, Feb 12, 2021 at 5:06 AM H.J. Lu <hjl.tools@gmail.com> wrote:
> >
> > On Fri, Feb 12, 2021 at 1:43 AM Florian Weimer <fweimer@redhat.com> wrote:
> > >
> > > * H. J. Lu via Libc-alpha:
> > >
> > > > On Thu, Feb 11, 2021 at 12:28 PM Joseph Myers <joseph@codesourcery.com> wrote:
> > > >>
> > > >> On Thu, 11 Feb 2021, H.J. Lu via Libc-alpha wrote:
> > > >>
> > > >> > An API for tagged address:
> > > >>
> > > >> Please write a longer commit message, discussing what "tagged address" is,
> > > >> which architectures have such a thing (the API should try to cover
> > > >> whatever is common between architectures as far as possible - is this
> > > >> meant to relate to AArch64 MTE, how does it relate to the MTE code we
> > > >
> > > > This API is for Intel LAM:
> > > >
> > > > https://www.phoronix.com/scan.php?page=news_item&px=Intel-LAM-Glibc#:~:text=Intel%20Linear%20Address%20Masking%20(LAM,bit%20linear%20addresses%20for%20metadata.&text=With%20LAM%20enabled%2C%20the%20processor,linear%20address%20to%20access%20memory.
> > > >
> > > > and ARM TBI:
> > > >
> > > > https://en.wikichip.org/wiki/arm/tbi
> > >
> > > Do the setters/getters change process or thread properties?
> >
> > On x86-64, mask is stored in TCB.   TCB will be updated.  It applies
> > to all threads.
> >
> > > The interface assumes that the tag bits are uniform across pointer
> > > types.  I think that's not true, at least from a historical perspective.
> >
> > This is true for LAM and TBI.
> >
> > > People complained that our protection key interfaces are too slow to be
> > > useful.  Do we need to find a way to inline the tag/untag operations?
> > >
> >
> > The internal interface is inlined.  We can also inline the public interface
> > if needed.  But set_tagged_address_mask isn't inlined at all.
> >
> > --
> > H.J.
>
> Add Ved and Kirill.
>

Kirill raised a question what should happen when

/* Set the mask for address bits used in address translation.  Return 0
   on success.  Return -1 on error.  */
extern int set_tagged_address_mask (uintptr_t __mask);

was called in a thread.  It won't work when 2 threads have different address
masks.  I think set_tagged_address_mask should be disallowed in child
threads and in parent thread when there are any active child threads.

-- 
H.J.

  reply	other threads:[~2021-02-17 21:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-11 17:37 H.J. Lu
2021-02-11 20:28 ` Joseph Myers
2021-02-11 21:39   ` H.J. Lu
2021-02-12  9:43     ` Florian Weimer
2021-02-12 13:06       ` H.J. Lu
2021-02-17 18:43         ` H.J. Lu
2021-02-17 21:58           ` H.J. Lu [this message]
2021-02-18 13:24             ` Szabolcs Nagy
2021-02-18 13:28               ` Florian Weimer
2021-02-18 13:50                 ` Szabolcs Nagy
2021-02-18 22:32                   ` H.J. Lu
2021-02-22  8:27                     ` Szabolcs Nagy
2021-02-22 13:57                       ` H.J. Lu
2021-02-18 13:17         ` Szabolcs Nagy
2021-02-18 13:21           ` Florian Weimer

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