From: "H.J. Lu" <hjl.tools@gmail.com>
To: Sajan Karumanchi <sajan.karumanchi@gmail.com>
Cc: GNU C Library <libc-alpha@sourceware.org>,
"Carlos O'Donell" <carlos@redhat.com>,
"Mallappa, Premachandra" <premachandra.mallappa@amd.com>,
Sajan Karumanchi <sajan.karumanchi@amd.com>
Subject: Re: [PATCH 1/1] x86: Tuning NT Threshold parameter for AMD machines.
Date: Mon, 7 Dec 2020 06:23:48 -0800 [thread overview]
Message-ID: <CAMe9rOpj8gJSZLVfaz_eqYyWJSY2vqcLX_w5ZjwGNEwjqgAt8Q@mail.gmail.com> (raw)
In-Reply-To: <20200908113638.6961-1-sajan.karumanchi@amd.com>
On Tue, Sep 8, 2020 at 4:39 AM Sajan Karumanchi
<sajan.karumanchi@gmail.com> wrote:
>
> Thanks H.J.Lu for reviewing the patch.
> Before pushing a rebased patch, I am looking for answers regarding
> the performance drop observed only in large bench variant results for
> size ranges of 1MB to 8MB.
> For more details, please refer to the cover letter
> https://sourceware.org/pipermail/libc-alpha/2020-August/117080.html
>
Please update your patch since the code has been changed by
commit d3c57027470b78dba79c6d931e4e409b1fecfc80
Author: Patrick McGehearty <patrick.mcgehearty@oracle.com>
Date: Mon Sep 28 20:11:28 2020 +0000
Reversing calculation of __x86_shared_non_temporal_threshold
--
H.J.
prev parent reply other threads:[~2020-12-07 14:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-19 10:45 [PATCH 0/1] " Sajan Karumanchi
2020-08-19 10:45 ` [PATCH 1/1] " Sajan Karumanchi
2020-09-01 19:23 ` H.J. Lu
2020-09-08 11:36 ` Sajan Karumanchi
2020-12-07 14:23 ` H.J. Lu [this message]
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