From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by sourceware.org (Postfix) with ESMTPS id 7157C386CE63 for ; Wed, 29 Jun 2022 18:54:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7157C386CE63 Received: by mail-pj1-x1033.google.com with SMTP id n16-20020a17090ade9000b001ed15b37424so351244pjv.3 for ; Wed, 29 Jun 2022 11:54:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=WFtgOJUryJUODRfCDI4Y8xsjJ4EQ6RTHFVMpkt0YFkQ=; b=tIGyPyspJzO4H2ZyHEKRGccyTwJKP7B6HKxYEHi/m+MGR8N+QVsTii0vhtFX7MgHrL lgnueN4cN3WxHsx9GrtmojgYk86E+/wuKVoeC4Zkbn9eyBQ+eoQhXI019K01Wp9uK9ZO N81bc+QbdGGtMlEZCwCIULQZ3BA9m/MaIWinYAHe4UnzqJGmX3r/vUJctv6ZfcFV94EA N/E1dYAIdWQcw4VICiuEVxlE6Cvwl/7Xue3WGxFHPX+OE5vdKEKtTo3p56ZksBSAQXAY KpLrL41jcD7G+eTuoECIsSnEardkVRkO98M1KAMfNeUNbGDD0mPx4QV/opQxXgBvp14M RzMQ== X-Gm-Message-State: AJIora+KOF6ah3vdhaDsRo8VUsC4T2vs0yGYcMztAvaoMZSZexpsX3Le xVyPZvJeX+sMluYCVEIoD01d/kg+KeSqIhnjTOY= X-Google-Smtp-Source: AGRyM1tes60k57+FCG3oK61wMssSdRAPxnpBfjXdRoW/KxoN1OuQdl6DIPBqvvZb5LnxvuG0U+bT/h4TrIQpT1QTCv4= X-Received: by 2002:a17:902:b215:b0:168:da4b:c925 with SMTP id t21-20020a170902b21500b00168da4bc925mr10256680plr.155.1656528874484; Wed, 29 Jun 2022 11:54:34 -0700 (PDT) MIME-Version: 1.0 References: <20220628152717.17838-1-goldstein.w.n@gmail.com> In-Reply-To: <20220628152717.17838-1-goldstein.w.n@gmail.com> From: "H.J. Lu" Date: Wed, 29 Jun 2022 11:53:58 -0700 Message-ID: Subject: Re: [PATCH v1 1/2] x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 To: Noah Goldstein Cc: GNU C Library , "Carlos O'Donell" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-3024.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Jun 2022 18:54:36 -0000 On Tue, Jun 28, 2022 at 8:27 AM Noah Goldstein wrote: > > Just for clarities sake and so that if a future implementation is > added we remember to add the check. > --- > sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h > index ee36525bcf..204c4b5406 100644 > --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h > +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h > @@ -27,7 +27,11 @@ IFUNC_SELECTOR (void) > { > const struct cpu_features* cpu_features = __get_cpu_features (); > > - if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) > + /* This function uses slow sse4.2 instructions (pcmpstri) but since > + there is no other optimized implementation keep using. If an > + optimized fallback is added add a X86_ISA_CPU_FEATURE_USABLE_P > + (cpu_features, SSE4_2) check. */ Did you mean Slow_SSE4_2? > + if (ISA_CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) > return OPTIMIZE (sse42); > > return OPTIMIZE (generic); > -- > 2.34.1 > -- H.J.