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Fri, 10 Nov 2023 17:37:01 +0000 From: Wilco Dijkstra To: 'GNU C Library' CC: Szabolcs Nagy Subject: [PATCH 3/3] AArch64: Remove Falkor memcpy Thread-Topic: [PATCH 3/3] AArch64: Remove Falkor memcpy Thread-Index: AQHaE/xZBFV/Y2tME0ynXF/9UXDNIg== Date: Fri, 10 Nov 2023 17:37:01 +0000 Message-ID: Accept-Language: en-GB, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: PAWPR08MB8982:EE_|AS8PR08MB7766:EE_|DB5PEPF00014B8D:EE_|GV2PR08MB8390:EE_ X-MS-Office365-Filtering-Correlation-Id: 916f2fa3-b352-4c01-28f3-08dbe213ad84 x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: HvvCsByj8vQBuG1Nf8JBPv2upCiBaGYnv1kNVcNxaR8o8WUk+b75UXYSHrfMqIQncehLz8Q8rJEoT9dEoOYFExrNQw1Q8U0MNr2Uei7KS6RFaxT+1ahvzqftV2iQJ0Bu1kI5uErUN//xab4jqA9KO9oeS+ASfEzzpPJSYpx9fusFA9q9xMYO852PMInLtr7z8UO2T6dUC7gtWttoXMd3KVYYYJvWl6GYKKyeUCr6iXvrJZDnSDJ2qTJZFankbo4ZEr4EuD9h13rQfOA4IJQW6gBDnT0qW0oPnuNfipbNbkO6DqEYhlj1hagUyS5yhUKOeTvJTc1BgngeBiKvGB5eQhS597PcYtJ8oNznz4A5aZIDhUQu0/sKyJAF5al8g9KcysXXjP+gzHyUx8l8ELfReoevv1oPqOh+i7Qy5BQPJfSfhYxSdqbOAtYG58eLcEJN4WjloD5ZhPskJiUJG4uIe2u391VR2Mo51n6mdogXr18DN+1AqIafXVBZFIBxssH7vjLoTuYKEvPzsc3tg2jSmcZZDRD5N3B8/18ptHKNCMKCEEt2h/RvGEvGrf+19jOBk3Y6CQYS3GKM8jVOUjoOzxt8MA154Ao9vA/CICXR032Nx5zgF5S/EOWhmSlQxDUlH4M/6fGdQIxe3VqPoC3rfrzpNFqJrXyUbEzyheW5edMfirKF0Z6ewQa7pObEjpP28FgM7ErWnqaEfs0Unuve+Cqs6D6qVfPmc164QhUOjdU= X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAWPR08MB8982.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(136003)(366004)(346002)(396003)(39860400002)(376002)(230922051799003)(64100799003)(451199024)(186009)(1800799009)(26005)(38100700002)(6506007)(7696005)(55016003)(122000001)(83380400001)(9686003)(478600001)(316002)(966005)(71200400001)(91956017)(66946007)(64756008)(76116006)(66556008)(66476007)(66446008)(6916009)(8936002)(38070700009)(33656002)(41300700001)(4326008)(52536014)(2906002)(8676002)(86362001)(5660300002)(30864003)(21314003)(2004002);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2023 17:37:14.6432 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 916f2fa3-b352-4c01-28f3-08dbe213ad84 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B8D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR08MB8390 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,KAM_LOTSOFHASH,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: =0A= The latest implementations of memcpy are actually faster than the Falkor=0A= implementations [1], so remove the falkor/phecda ifuncs for memcpy and=0A= the now unused IS_FALKOR/IS_PHECDA defines.=0A= =0A= Passes regress on AArch64. OK for commit?=0A= =0A= [1] https://sourceware.org/pipermail/libc-alpha/2022-December/144227.html= =0A= =0A= ---=0A= =0A= diff --git a/manual/tunables.texi b/manual/tunables.texi=0A= index 776fd93fd99741ad4ee99e6553e819538c851e29..d9669ba92df2ac02264009c1562= 6abe11e7b12d8 100644=0A= --- a/manual/tunables.texi=0A= +++ b/manual/tunables.texi=0A= @@ -532,7 +532,7 @@ This tunable is specific to powerpc, powerpc64 and powe= rpc64le.=0A= @deftp Tunable glibc.cpu.name=0A= The @code{glibc.cpu.name=3Dxxx} tunable allows the user to tell @theglibc{= } to=0A= assume that the CPU is @code{xxx} where xxx may have one of these values:= =0A= -@code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99},=0A= +@code{generic}, @code{thunderxt88}, @code{thunderx2t99},=0A= @code{thunderx2t99p1}, @code{ares}, @code{emag}, @code{kunpeng},=0A= @code{a64fx}.=0A= =0A= diff --git a/sysdeps/aarch64/multiarch/Makefile b/sysdeps/aarch64/multiarch= /Makefile=0A= index 171ca5e4cf9a87fc7df5896f21c2e5b94ea218ba..e4720b746859f51502e070ba0c2= f308072a49740 100644=0A= --- a/sysdeps/aarch64/multiarch/Makefile=0A= +++ b/sysdeps/aarch64/multiarch/Makefile=0A= @@ -3,7 +3,6 @@ sysdep_routines +=3D \=0A= memchr_generic \=0A= memchr_nosimd \=0A= memcpy_a64fx \=0A= - memcpy_falkor \=0A= memcpy_generic \=0A= memcpy_mops \=0A= memcpy_sve \=0A= diff --git a/sysdeps/aarch64/multiarch/ifunc-impl-list.c b/sysdeps/aarch64/= multiarch/ifunc-impl-list.c=0A= index fdd9ea92463123df213dec27f6f0598f8ce54d6e..73038ac8102b1ef8a58a51ca196= 38720f26e6a66 100644=0A= --- a/sysdeps/aarch64/multiarch/ifunc-impl-list.c=0A= +++ b/sysdeps/aarch64/multiarch/ifunc-impl-list.c=0A= @@ -36,7 +36,6 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifu= nc_impl *array,=0A= IFUNC_IMPL (i, name, memcpy,=0A= IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_thunderx)=0A= IFUNC_IMPL_ADD (array, i, memcpy, !bti, __memcpy_thunderx2)=0A= - IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_falkor)=0A= #if HAVE_AARCH64_SVE_ASM=0A= IFUNC_IMPL_ADD (array, i, memcpy, sve, __memcpy_a64fx)=0A= IFUNC_IMPL_ADD (array, i, memcpy, sve, __memcpy_sve)=0A= @@ -46,7 +45,6 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifu= nc_impl *array,=0A= IFUNC_IMPL (i, name, memmove,=0A= IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_thunderx)=0A= IFUNC_IMPL_ADD (array, i, memmove, !bti, __memmove_thunderx2)=0A= - IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_falkor)=0A= #if HAVE_AARCH64_SVE_ASM=0A= IFUNC_IMPL_ADD (array, i, memmove, sve, __memmove_a64fx)=0A= IFUNC_IMPL_ADD (array, i, memmove, sve, __memmove_sve)=0A= diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch= /memcpy.c=0A= index 9aace954cbfd1eb3e2b35e570e4eb31bbb3c6cfe..6471fe82e32e91086ea862a4e1a= 488129e4af456 100644=0A= --- a/sysdeps/aarch64/multiarch/memcpy.c=0A= +++ b/sysdeps/aarch64/multiarch/memcpy.c=0A= @@ -31,7 +31,6 @@ extern __typeof (__redirect_memcpy) __libc_memcpy;=0A= extern __typeof (__redirect_memcpy) __memcpy_generic attribute_hidden;=0A= extern __typeof (__redirect_memcpy) __memcpy_thunderx attribute_hidden;=0A= extern __typeof (__redirect_memcpy) __memcpy_thunderx2 attribute_hidden;= =0A= -extern __typeof (__redirect_memcpy) __memcpy_falkor attribute_hidden;=0A= extern __typeof (__redirect_memcpy) __memcpy_a64fx attribute_hidden;=0A= extern __typeof (__redirect_memcpy) __memcpy_sve attribute_hidden;=0A= extern __typeof (__redirect_memcpy) __memcpy_mops attribute_hidden;=0A= @@ -57,9 +56,6 @@ select_memcpy_ifunc (void)=0A= if (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr))=0A= return __memcpy_thunderx2;=0A= =0A= - if (IS_FALKOR (midr) || IS_PHECDA (midr))=0A= - return __memcpy_falkor;=0A= -=0A= return __memcpy_generic;=0A= }=0A= =0A= diff --git a/sysdeps/aarch64/multiarch/memcpy_falkor.S b/sysdeps/aarch64/mu= ltiarch/memcpy_falkor.S=0A= deleted file mode 100644=0A= index 67c4ab34eba40c37c6aae08be6cb5e11e2a82d17..000000000000000000000000000= 0000000000000=0A= --- a/sysdeps/aarch64/multiarch/memcpy_falkor.S=0A= +++ /dev/null=0A= @@ -1,313 +0,0 @@=0A= -/* Optimized memcpy for Qualcomm Falkor processor.=0A= - Copyright (C) 2017-2023 Free Software Foundation, Inc.=0A= -=0A= - This file is part of the GNU C Library.=0A= -=0A= - The GNU C Library is free software; you can redistribute it and/or=0A= - modify it under the terms of the GNU Lesser General Public=0A= - License as published by the Free Software Foundation; either=0A= - version 2.1 of the License, or (at your option) any later version.=0A= -=0A= - The GNU C Library is distributed in the hope that it will be useful,=0A= - but WITHOUT ANY WARRANTY; without even the implied warranty of=0A= - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU=0A= - Lesser General Public License for more details.=0A= -=0A= - You should have received a copy of the GNU Lesser General Public=0A= - License along with the GNU C Library. If not, see=0A= - . */=0A= -=0A= -#include =0A= -=0A= -/* Assumptions:=0A= -=0A= - ARMv8-a, AArch64, falkor, unaligned accesses. */=0A= -=0A= -#define dstin x0=0A= -#define src x1=0A= -#define count x2=0A= -#define dst x3=0A= -#define srcend x4=0A= -#define dstend x5=0A= -#define tmp1 x14=0A= -#define A_x x6=0A= -#define B_x x7=0A= -#define A_w w6=0A= -#define B_w w7=0A= -=0A= -#define A_q q0=0A= -#define B_q q1=0A= -#define C_q q2=0A= -#define D_q q3=0A= -#define E_q q4=0A= -#define F_q q5=0A= -#define G_q q6=0A= -#define H_q q7=0A= -#define Q_q q6=0A= -#define S_q q22=0A= -=0A= -/* Copies are split into 3 main cases:=0A= -=0A= - 1. Small copies of up to 32 bytes=0A= - 2. Medium copies of 33..128 bytes which are fully unrolled=0A= - 3. Large copies of more than 128 bytes.=0A= -=0A= - Large copies align the source to a quad word and use an unrolled loop= =0A= - processing 64 bytes per iteration.=0A= -=0A= - FALKOR-SPECIFIC DESIGN:=0A= -=0A= - The smallest copies (32 bytes or less) focus on optimal pipeline usage,= =0A= - which is why the redundant copies of 0-3 bytes have been replaced with= =0A= - conditionals, since the former would unnecessarily break across multipl= e=0A= - issue groups. The medium copy group has been enlarged to 128 bytes sin= ce=0A= - bumping up the small copies up to 32 bytes allows us to do that without= =0A= - cost and also allows us to reduce the size of the prep code before loop= 64.=0A= -=0A= - The copy loop uses only one register q0. This is to ensure that all lo= ads=0A= - hit a single hardware prefetcher which can get correctly trained to pre= fetch=0A= - a single stream.=0A= -=0A= - The non-temporal stores help optimize cache utilization. */=0A= -=0A= -#if IS_IN (libc)=0A= -ENTRY (__memcpy_falkor)=0A= -=0A= - PTR_ARG (0)=0A= - PTR_ARG (1)=0A= - SIZE_ARG (2)=0A= -=0A= - cmp count, 32=0A= - add srcend, src, count=0A= - add dstend, dstin, count=0A= - b.ls L(copy32)=0A= - cmp count, 128=0A= - b.hi L(copy_long)=0A= -=0A= - /* Medium copies: 33..128 bytes. */=0A= -L(copy128):=0A= - sub tmp1, count, 1=0A= - ldr A_q, [src]=0A= - ldr B_q, [src, 16]=0A= - ldr C_q, [srcend, -32]=0A= - ldr D_q, [srcend, -16]=0A= - tbz tmp1, 6, 1f=0A= - ldr E_q, [src, 32]=0A= - ldr F_q, [src, 48]=0A= - ldr G_q, [srcend, -64]=0A= - ldr H_q, [srcend, -48]=0A= - str G_q, [dstend, -64]=0A= - str H_q, [dstend, -48]=0A= - str E_q, [dstin, 32]=0A= - str F_q, [dstin, 48]=0A= -1:=0A= - str A_q, [dstin]=0A= - str B_q, [dstin, 16]=0A= - str C_q, [dstend, -32]=0A= - str D_q, [dstend, -16]=0A= - ret=0A= -=0A= - .p2align 4=0A= - /* Small copies: 0..32 bytes. */=0A= -L(copy32):=0A= - /* 16-32 */=0A= - cmp count, 16=0A= - b.lo 1f=0A= - ldr A_q, [src]=0A= - ldr B_q, [srcend, -16]=0A= - str A_q, [dstin]=0A= - str B_q, [dstend, -16]=0A= - ret=0A= - .p2align 4=0A= -1:=0A= - /* 8-15 */=0A= - tbz count, 3, 1f=0A= - ldr A_x, [src]=0A= - ldr B_x, [srcend, -8]=0A= - str A_x, [dstin]=0A= - str B_x, [dstend, -8]=0A= - ret=0A= - .p2align 4=0A= -1:=0A= - /* 4-7 */=0A= - tbz count, 2, 1f=0A= - ldr A_w, [src]=0A= - ldr B_w, [srcend, -4]=0A= - str A_w, [dstin]=0A= - str B_w, [dstend, -4]=0A= - ret=0A= - .p2align 4=0A= -1:=0A= - /* 2-3 */=0A= - tbz count, 1, 1f=0A= - ldrh A_w, [src]=0A= - ldrh B_w, [srcend, -2]=0A= - strh A_w, [dstin]=0A= - strh B_w, [dstend, -2]=0A= - ret=0A= - .p2align 4=0A= -1:=0A= - /* 0-1 */=0A= - tbz count, 0, 1f=0A= - ldrb A_w, [src]=0A= - strb A_w, [dstin]=0A= -1:=0A= - ret=0A= -=0A= - /* Align SRC to 16 bytes and copy; that way at least one of the=0A= - accesses is aligned throughout the copy sequence.=0A= -=0A= - The count is off by 0 to 15 bytes, but this is OK because we trim=0A= - off the last 64 bytes to copy off from the end. Due to this the=0A= - loop never runs out of bounds. */=0A= -=0A= - .p2align 4=0A= - nop /* Align loop64 below. */=0A= -L(copy_long):=0A= - ldr A_q, [src]=0A= - sub count, count, 64 + 16=0A= - and tmp1, src, 15=0A= - str A_q, [dstin]=0A= - bic src, src, 15=0A= - sub dst, dstin, tmp1=0A= - add count, count, tmp1=0A= -=0A= -L(loop64):=0A= - ldr A_q, [src, 16]!=0A= - str A_q, [dst, 16]=0A= - ldr A_q, [src, 16]!=0A= - subs count, count, 64=0A= - str A_q, [dst, 32]=0A= - ldr A_q, [src, 16]!=0A= - str A_q, [dst, 48]=0A= - ldr A_q, [src, 16]!=0A= - str A_q, [dst, 64]!=0A= - b.hi L(loop64)=0A= -=0A= - /* Write the last full set of 64 bytes. The remainder is at most 64=0A= - bytes, so it is safe to always copy 64 bytes from the end even if=0A= - there is just 1 byte left. */=0A= - ldr E_q, [srcend, -64]=0A= - str E_q, [dstend, -64]=0A= - ldr D_q, [srcend, -48]=0A= - str D_q, [dstend, -48]=0A= - ldr C_q, [srcend, -32]=0A= - str C_q, [dstend, -32]=0A= - ldr B_q, [srcend, -16]=0A= - str B_q, [dstend, -16]=0A= - ret=0A= -=0A= -END (__memcpy_falkor)=0A= -=0A= -=0A= -/* RATIONALE:=0A= -=0A= - The move has 4 distinct parts:=0A= - * Small moves of 32 bytes and under.=0A= - * Medium sized moves of 33-128 bytes (fully unrolled).=0A= - * Large moves where the source address is higher than the destination= =0A= - (forward copies)=0A= - * Large moves where the destination address is higher than the source= =0A= - (copy backward, or move).=0A= -=0A= - We use only two registers q6 and q22 for the moves and move 32 bytes at= a=0A= - time to correctly train the hardware prefetcher for better throughput.= =0A= -=0A= - For small and medium cases memcpy is used. */=0A= -=0A= -ENTRY (__memmove_falkor)=0A= -=0A= - PTR_ARG (0)=0A= - PTR_ARG (1)=0A= - SIZE_ARG (2)=0A= -=0A= - cmp count, 32=0A= - add srcend, src, count=0A= - add dstend, dstin, count=0A= - b.ls L(copy32)=0A= - cmp count, 128=0A= - b.ls L(copy128)=0A= - sub tmp1, dstin, src=0A= - ccmp tmp1, count, 2, hi=0A= - b.lo L(move_long)=0A= -=0A= - /* CASE: Copy Forwards=0A= -=0A= - Align src to 16 byte alignment so that we don't cross cache line=0A= - boundaries on both loads and stores. There are at least 128 bytes=0A= - to copy, so copy 16 bytes unaligned and then align. The loop=0A= - copies 32 bytes per iteration and prefetches one iteration ahead. */= =0A= -=0A= - ldr S_q, [src]=0A= - and tmp1, src, 15=0A= - bic src, src, 15=0A= - sub dst, dstin, tmp1=0A= - add count, count, tmp1 /* Count is now 16 too large. */=0A= - ldr Q_q, [src, 16]!=0A= - str S_q, [dstin]=0A= - ldr S_q, [src, 16]!=0A= - sub count, count, 32 + 32 + 16 /* Test and readjust count. */=0A= -=0A= - .p2align 4=0A= -1:=0A= - subs count, count, 32=0A= - str Q_q, [dst, 16]=0A= - ldr Q_q, [src, 16]!=0A= - str S_q, [dst, 32]!=0A= - ldr S_q, [src, 16]!=0A= - b.hi 1b=0A= -=0A= - /* Copy 32 bytes from the end before writing the data prefetched in the= =0A= - last loop iteration. */=0A= -2:=0A= - ldr B_q, [srcend, -32]=0A= - ldr C_q, [srcend, -16]=0A= - str Q_q, [dst, 16]=0A= - str S_q, [dst, 32]=0A= - str B_q, [dstend, -32]=0A= - str C_q, [dstend, -16]=0A= - ret=0A= -=0A= - /* CASE: Copy Backwards=0A= -=0A= - Align srcend to 16 byte alignment so that we don't cross cache line=0A= - boundaries on both loads and stores. There are at least 128 bytes=0A= - to copy, so copy 16 bytes unaligned and then align. The loop=0A= - copies 32 bytes per iteration and prefetches one iteration ahead. */= =0A= -=0A= - .p2align 4=0A= - nop=0A= - nop=0A= -L(move_long):=0A= - cbz tmp1, 3f /* Return early if src =3D=3D dstin */=0A= - ldr S_q, [srcend, -16]=0A= - and tmp1, srcend, 15=0A= - sub srcend, srcend, tmp1=0A= - ldr Q_q, [srcend, -16]!=0A= - str S_q, [dstend, -16]=0A= - sub count, count, tmp1=0A= - ldr S_q, [srcend, -16]!=0A= - sub dstend, dstend, tmp1=0A= - sub count, count, 32 + 32=0A= -=0A= -1:=0A= - subs count, count, 32=0A= - str Q_q, [dstend, -16]=0A= - ldr Q_q, [srcend, -16]!=0A= - str S_q, [dstend, -32]!=0A= - ldr S_q, [srcend, -16]!=0A= - b.hi 1b=0A= -=0A= - /* Copy 32 bytes from the start before writing the data prefetched in the= =0A= - last loop iteration. */=0A= -=0A= - ldr B_q, [src, 16]=0A= - ldr C_q, [src]=0A= - str Q_q, [dstend, -16]=0A= - str S_q, [dstend, -32]=0A= - str B_q, [dstin, 16]=0A= - str C_q, [dstin]=0A= -3: ret=0A= -=0A= -END (__memmove_falkor)=0A= -#endif=0A= diff --git a/sysdeps/aarch64/multiarch/memmove.c b/sysdeps/aarch64/multiarc= h/memmove.c=0A= index fd346e7b73a86a076ba8e1cdd7fd588098333f48..7602a5d57d1384fa06167aea58b= 8b16b94f49e4f 100644=0A= --- a/sysdeps/aarch64/multiarch/memmove.c=0A= +++ b/sysdeps/aarch64/multiarch/memmove.c=0A= @@ -31,7 +31,6 @@ extern __typeof (__redirect_memmove) __libc_memmove;=0A= extern __typeof (__redirect_memmove) __memmove_generic attribute_hidden;= =0A= extern __typeof (__redirect_memmove) __memmove_thunderx attribute_hidden;= =0A= extern __typeof (__redirect_memmove) __memmove_thunderx2 attribute_hidden;= =0A= -extern __typeof (__redirect_memmove) __memmove_falkor attribute_hidden;=0A= extern __typeof (__redirect_memmove) __memmove_a64fx attribute_hidden;=0A= extern __typeof (__redirect_memmove) __memmove_sve attribute_hidden;=0A= extern __typeof (__redirect_memmove) __memmove_mops attribute_hidden;=0A= @@ -57,9 +56,6 @@ select_memmove_ifunc (void)=0A= if (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr))=0A= return __memmove_thunderx2;=0A= =0A= - if (IS_FALKOR (midr) || IS_PHECDA (midr))=0A= - return __memmove_falkor;=0A= -=0A= return __memmove_generic;=0A= }=0A= =0A= diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/= sysv/linux/aarch64/cpu-features.h=0A= index 40b709677d86f040c653315199f62677425abc58..2cf745cd1920552149da9b497f3= ff4d7572480b8 100644=0A= --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h=0A= +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h=0A= @@ -47,11 +47,6 @@=0A= #define IS_THUNDERX2(midr) (MIDR_IMPLEMENTOR(midr) =3D=3D 'C' \=0A= && MIDR_PARTNUM(midr) =3D=3D 0xaf)=0A= =0A= -#define IS_FALKOR(midr) (MIDR_IMPLEMENTOR(midr) =3D=3D 'Q' \=0A= - && MIDR_PARTNUM(midr) =3D=3D 0xc00)=0A= -=0A= -#define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) =3D=3D 'h' \=0A= - && MIDR_PARTNUM(midr) =3D=3D 0x000)=0A= #define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) =3D=3D 'A' \= =0A= && MIDR_PARTNUM(midr) =3D=3D 0xd0c)=0A= #define IS_NEOVERSE_N2(midr) (MIDR_IMPLEMENTOR(midr) =3D=3D 'A' \= =0A= diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/= sysv/linux/aarch64/cpu-features.c=0A= index 233d5b2407e2b792805b7fa661852f59fca0cb71..a11a86efab64118fd2622840228= d6bbb4d0b860c 100644=0A= --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c=0A= +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c=0A= @@ -37,11 +37,9 @@ struct cpu_list=0A= };=0A= =0A= static struct cpu_list cpu_list[] =3D {=0A= - {"falkor", 0x510FC000},=0A= {"thunderxt88", 0x430F0A10},=0A= {"thunderx2t99", 0x431F0AF0},=0A= {"thunderx2t99p1", 0x420F5160},=0A= - {"phecda", 0x680F0000},=0A= {"ares", 0x411FD0C0},=0A= {"emag", 0x503F0001},=0A= {"kunpeng920", 0x481FD010},=0A= =0A=