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Lu" CC: 'GNU C Library' Subject: Re: [PATCH v6 3/4] Reduce CAS in malloc spinlocks Thread-Topic: [PATCH v6 3/4] Reduce CAS in malloc spinlocks Thread-Index: AQHZR7BncCc0vNb1aU6gzO0+X3qL6A== Date: Thu, 23 Feb 2023 18:27:51 +0000 Message-ID: Accept-Language: en-GB, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; x-ms-traffictypediagnostic: PAWPR08MB8982:EE_|DBAPR08MB5749:EE_|DBAEUR03FT025:EE_|AM7PR08MB5413:EE_ X-MS-Office365-Filtering-Correlation-Id: 48614da8-4a1c-4bb0-2c5c-08db15cbb125 x-checkrecipientrouted: true nodisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: aFen2rcyh12CFw/RbhPL9xr70MwI6WA0yYRO3baroIZCtC81lN3XuMdiPflmdhflFufqbmRkXPIe2zg8NImhjeAApFwL1IhRRs8A07tQrfx4FdqGMmCOpTBRRJBA/gA5eDbx+tmTIN7pqmtGh4F7eUHDruxpp6daZowtbobreAc2kvVOCgkhZzXM1kLmW2/LLzxJLU3IeANVCfko78qwnYsWRcHXmvVyNikoLWc0YE35SanOYhpkZigEPMjLv9SnvvF8QQCyCMcEa38LeJUhqxjD2I3puovr5cidvdMw6TzoDS2I4lCEoO7gXnAEq6FH+PrUceoWDdcaeds5tCV8QOi2J7/zZvFpBn9SdY/LFUR5rugQ8np/sUH41OrlU5w/wyt98jd2BAXZTMIDC8FFW+D1BZGP2kTovOsdxYoXCHtCQy0HlaZKm7PAjqf2fg2/bU3MNqGPvZ5rNH9fX5RT7NFuNaxxGJ5XnCoGUJZTyNunq6LRGE2Jadsd2jlgKv6Du+4jtkr09pDwf4tOwgo87LioGuevDL9G3urgKYM+Xl8ZcLZAHWlbpoDHH6/Q8t+kxO2WN12r2HNBKXSY9OgTouHBETpniNuF11WjgQnKvnuQWFF3MrKCF6hf82eZBjSp2mpOeA3d1Oaq29LLutVLFjhKnWhqlzYa7WVkid9bCx8XfCkSIoH0mwTpc74CljG1wl1zJgkogXuriwMWS6qqEw== X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAWPR08MB8982.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230025)(4636009)(366004)(136003)(376002)(346002)(396003)(39860400002)(451199018)(64756008)(76116006)(66946007)(66556008)(66476007)(91956017)(66446008)(110136005)(83380400001)(8676002)(8936002)(316002)(52536014)(5660300002)(41300700001)(4326008)(6506007)(9686003)(26005)(186003)(478600001)(7696005)(71200400001)(33656002)(38070700005)(55016003)(86362001)(2906002)(122000001)(38100700002);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2023 18:27:59.7604 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48614da8-4a1c-4bb0-2c5c-08db15cbb125 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT025.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR08MB5413 X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi DJ,=0A= =0A= > size_t n =3D narenas;=0A= > if (__glibc_unlikely (n <=3D narenas_limit - 1))=0A= > {=0A= > + if (atomic_load_relaxed (&narenas) !=3D n)=0A= > + {=0A= > + atomic_spin_nop ();=0A= > + goto repeat;=0A= > + }=0A= > if (catomic_compare_and_exchange_bool_acq (&narenas, n + 1, n)= )=0A= > goto repeat;=0A= =0A= Before we consider optimizing it, we should first simplify it. All this wan= ts=0A= to do is a relaxed atomic add, then check the maximum arenas and=0A= treat the case of having too many arenas in the same way as failure to=0A= create another arena (ie. just atomically decrement again). Ie. no CAS=0A= loop required, and there is nothing to optimize either.=0A= =0A= > Should target-specific atomics optimizations be "hidden" somewhere in=0A= > the atomics implementation? Just because x86 may benefit from a=0A= > pre-read doesn't mean that all targets will, and if x86 generally=0A= > benefits, it should update its implementation of the atomics to do that= =0A= > at a lower level.=0A= =0A= We have been removing secret optimizations hidden behind atomics and just= =0A= use standard atomics everywhere. These micro optimizations are often counte= r-=0A= productive - it's far better to do them at a higher similar to the single-t= hread=0A= path in malloc/free.=0A= =0A= For these there is no evidence they are heavily contended - if anything the= =0A= extra code will just slow things down. The cost is in the CAS itself, we co= uld=0A= remove it from the multithreaded malloc path by splitting the free list int= o a=0A= local one (only accessed when you have the malloc lock) and a concurrent on= e.=0A= =0A= Cheers,=0A= Wilco=