From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by sourceware.org (Postfix) with ESMTPS id 28BD13858D1E for ; Thu, 22 Dec 2022 23:47:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 28BD13858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D6094B81B05; Thu, 22 Dec 2022 23:47:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3B7CC433EF; Thu, 22 Dec 2022 23:47:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671752869; bh=zVqSDNpdT+kFJDxvwXHswUM2OPXCEhuAADp3ua0H6Mo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=J3lJx1MgLaFWKEE03DBLZeawGlQLFGUKIaOYkc2Y0iiFEhkH6jJouCD0OCLSaiPv8 RoRVuJphMMZDWhNewxZlV4aXOmbMVeEkZfYpbHM1krZRCswbofguQzgi2bdwpwkNKq +dukYYocg3yuPUDhFKG7+liFqs+PZoPQoQQBDYWQvvQ5kWcwp8iGg2arn/gLkBox4C 1BVL3etaUkfizK9jvScJuGLKMKvqkptLRb8jiuKMvUn/c6qjAXMv4nTdGI2HVg7ykK P2U3LsiMMmtiNppwQJO5qYkGo2fJt9N+aav8ceqgRvKd8WJxlntDkD25UrhOCenBCP xU6qfdPxmiwmQ== Date: Thu, 22 Dec 2022 23:47:43 +0000 From: Conor Dooley To: Andy Chiu Cc: Richard Henderson , Vineet Gupta , Vincent Chen , Florian Weimer , Rich Felker , Andrew Waterman , Palmer Dabbelt , Kito Cheng , Christoph =?iso-8859-1?Q?M=FCllner?= , davidlt@rivosinc.com, Arnd Bergmann , =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= , Philipp Tomsich , Szabolcs Nagy , Greentime Hu , Aaron Durbin , Andrew de los Reyes , linux-riscv , GNU C Library Subject: Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Message-ID: References: <87sfy5ndid.fsf@oldenburg.str.redhat.com> <73c0124c-4794-6e40-460c-b26df407f322@rivosinc.com> <50c598a6-e3b3-3062-abe7-23a406067533@rivosinc.com> <7430f494-9b43-5e03-c1e9-6b83e2611a11@rivosinc.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="SlzGxRmkgYghrVNX" Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --SlzGxRmkgYghrVNX Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Dec 23, 2022 at 02:33:26AM +0800, Andy Chiu wrote: =20 > I wrote a PoC patch for this and it has been pushed into the following gi= t tree: > https://github.com/sifive/riscv-linux/tree/dev/andyc/for-next-v13 > I tested it on a rv32 QEMU virt machine and the user space can get/set > Vector registers normally. I haven't tested it on rv64 yet but it > should be no difference. The patch is not the final version and maybe > I missed some basic ideas. > But if everyone agrees with this approach > then I would like to start formalizing and submit the series. Between yourself and the Rivos folk, you should probably sort out who is doing what with the series at the very least, so that you're not both working on "competing" v13s... --SlzGxRmkgYghrVNX Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY6TsnwAKCRB4tDGHoIJi 0jcVAP0ZcNf7qkgZIPl5LDPs6yIWKy3lpHvX0/0WWigiYyIjvAD+L8d4fpCOJ05A m/jktFE4OegjNls7rNA+comvLSVpyQk= =rXN0 -----END PGP SIGNATURE----- --SlzGxRmkgYghrVNX--