From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by sourceware.org (Postfix) with ESMTPS id 5E4353858414 for ; Thu, 30 Dec 2021 19:47:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5E4353858414 Received: by mail-pl1-x633.google.com with SMTP id w24so18868482ply.12 for ; Thu, 30 Dec 2021 11:47:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=3WWhXGK5Bsxo5xRMniPndfBBM7h/yY0r+ARvOIAFGHI=; b=uSmq0cwfvlE2AvB5//TvymegsUF4CwixOd8z0dVOCC0oXknLfDsKbgGwW/gluCN6R/ iZ3Kf+lfgjpUJyvatuzN1u0asTuFVxrm8ojDo0F3MM4TIDjyOkCZPg7IkzgaIZ8+lknE pWpz2UGFdjx+xHMAcj7EtklyIkj++2EQva8J6gG1rpiacbRMAAcHQ0U45LaFWFZLSdeJ V4/4m6k25k13to6Ta1WPpw7Yb7nT2fqw2hv1VdukrQqP0duRHGQ/rcQQcRBK0coyficy 74Z/3azspnPL0AAcjvrQTGYIgRLFnKaw2AYNwZiEUU6yyRsZnLpqy/1TC5Uu4c7AlyK7 9x7A== X-Gm-Message-State: AOAM531PWALn0ftXquohXfbU0eokynd55CkCN9utoDQ/mWMqhJ0chM5i 6IJorXPHUkSlSBnxpqf72W8= X-Google-Smtp-Source: ABdhPJzfW9Getrj9ZPFdZDbOTQ8AKU2I7+luoSzd1jJPpAIrtafE8rQO7uDuHYzTC1ZQkcaN7EfC3A== X-Received: by 2002:a17:902:b20f:b0:149:9483:9407 with SMTP id t15-20020a170902b20f00b0014994839407mr12495901plr.54.1640893659531; Thu, 30 Dec 2021 11:47:39 -0800 (PST) Received: from gnu-tgl-3.localdomain ([172.58.35.133]) by smtp.gmail.com with ESMTPSA id ds24sm28519853pjb.36.2021.12.30.11.47.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 11:47:39 -0800 (PST) Received: by gnu-tgl-3.localdomain (Postfix, from userid 1000) id 3B5CCC0839; Thu, 30 Dec 2021 11:47:38 -0800 (PST) Date: Thu, 30 Dec 2021 11:47:38 -0800 From: "H.J. Lu" To: Sunil K Pandey Cc: libc-alpha@sourceware.org, andrey.kolesov@intel.com, marius.cornea@intel.com Subject: Re: [PATCH v3 1/1] x86-64: Add vector tan/tanf implementation to libmvec Message-ID: References: <20211230000358.3894697-1-skpgkp2@gmail.com> <20211230000358.3894697-2-skpgkp2@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211230000358.3894697-2-skpgkp2@gmail.com> X-Spam-Status: No, score=-3021.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Dec 2021 19:47:41 -0000 On Wed, Dec 29, 2021 at 04:03:58PM -0800, Sunil K Pandey wrote: > Implement vectorized tan/tanf containing SSE, AVX, AVX2 and > AVX512 versions for libmvec as per vector ABI. It also contains > accuracy and ABI tests for vector tan/tanf with regenerated ulps. > --- > bits/libm-simd-decl-stubs.h | 11 + > math/bits/mathcalls.h | 2 +- > .../unix/sysv/linux/x86_64/libmvec.abilist | 8 + > sysdeps/x86/fpu/bits/math-vector.h | 4 + > .../x86/fpu/finclude/math-vector-fortran.h | 4 + > sysdeps/x86_64/fpu/Makeconfig | 1 + > sysdeps/x86_64/fpu/Versions | 2 + > sysdeps/x86_64/fpu/libm-test-ulps | 20 + > .../fpu/multiarch/svml_d_tan2_core-sse2.S | 20 + > .../x86_64/fpu/multiarch/svml_d_tan2_core.c | 27 + > .../fpu/multiarch/svml_d_tan2_core_sse4.S | 6259 +++++++++++++++++ > .../fpu/multiarch/svml_d_tan4_core-sse.S | 20 + > .../x86_64/fpu/multiarch/svml_d_tan4_core.c | 27 + > .../fpu/multiarch/svml_d_tan4_core_avx2.S | 6227 ++++++++++++++++ > .../fpu/multiarch/svml_d_tan8_core-avx2.S | 20 + > .../x86_64/fpu/multiarch/svml_d_tan8_core.c | 27 + > .../fpu/multiarch/svml_d_tan8_core_avx512.S | 2733 +++++++ > .../fpu/multiarch/svml_s_tanf16_core-avx2.S | 20 + > .../x86_64/fpu/multiarch/svml_s_tanf16_core.c | 28 + > .../fpu/multiarch/svml_s_tanf16_core_avx512.S | 927 +++ > .../fpu/multiarch/svml_s_tanf4_core-sse2.S | 20 + > .../x86_64/fpu/multiarch/svml_s_tanf4_core.c | 28 + > .../fpu/multiarch/svml_s_tanf4_core_sse4.S | 2600 +++++++ > .../fpu/multiarch/svml_s_tanf8_core-sse.S | 20 + > .../x86_64/fpu/multiarch/svml_s_tanf8_core.c | 28 + > .../fpu/multiarch/svml_s_tanf8_core_avx2.S | 2595 +++++++ > sysdeps/x86_64/fpu/svml_d_tan2_core.S | 29 + > sysdeps/x86_64/fpu/svml_d_tan4_core.S | 29 + > sysdeps/x86_64/fpu/svml_d_tan4_core_avx.S | 25 + > sysdeps/x86_64/fpu/svml_d_tan8_core.S | 25 + > sysdeps/x86_64/fpu/svml_s_tanf16_core.S | 25 + > sysdeps/x86_64/fpu/svml_s_tanf4_core.S | 29 + > sysdeps/x86_64/fpu/svml_s_tanf8_core.S | 29 + > sysdeps/x86_64/fpu/svml_s_tanf8_core_avx.S | 25 + > .../x86_64/fpu/test-double-libmvec-tan-avx.c | 1 + > .../x86_64/fpu/test-double-libmvec-tan-avx2.c | 1 + > .../fpu/test-double-libmvec-tan-avx512f.c | 1 + > sysdeps/x86_64/fpu/test-double-libmvec-tan.c | 3 + > .../x86_64/fpu/test-double-vlen2-wrappers.c | 1 + > .../fpu/test-double-vlen4-avx2-wrappers.c | 1 + > .../x86_64/fpu/test-double-vlen4-wrappers.c | 1 + > .../x86_64/fpu/test-double-vlen8-wrappers.c | 1 + > .../x86_64/fpu/test-float-libmvec-tanf-avx.c | 1 + > .../x86_64/fpu/test-float-libmvec-tanf-avx2.c | 1 + > .../fpu/test-float-libmvec-tanf-avx512f.c | 1 + > sysdeps/x86_64/fpu/test-float-libmvec-tanf.c | 3 + > .../x86_64/fpu/test-float-vlen16-wrappers.c | 1 + > .../x86_64/fpu/test-float-vlen4-wrappers.c | 1 + > .../fpu/test-float-vlen8-avx2-wrappers.c | 1 + > .../x86_64/fpu/test-float-vlen8-wrappers.c | 1 + > 50 files changed, 21913 insertions(+), 1 deletion(-) > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan2_core-sse2.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan2_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan2_core_sse4.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan4_core-sse.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan4_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan4_core_avx2.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core-avx2.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf16_core-avx2.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf16_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf16_core_avx512.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf4_core-sse2.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf4_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf4_core_sse4.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf8_core-sse.S > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf8_core.c > create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanf8_core_avx2.S > create mode 100644 sysdeps/x86_64/fpu/svml_d_tan2_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_d_tan4_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_d_tan4_core_avx.S > create mode 100644 sysdeps/x86_64/fpu/svml_d_tan8_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_s_tanf16_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_s_tanf4_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_s_tanf8_core.S > create mode 100644 sysdeps/x86_64/fpu/svml_s_tanf8_core_avx.S > create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-tan-avx.c > create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-tan-avx2.c > create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-tan-avx512f.c > create mode 100644 sysdeps/x86_64/fpu/test-double-libmvec-tan.c > create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-tanf-avx.c > create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-tanf-avx2.c > create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-tanf-avx512f.c > create mode 100644 sysdeps/x86_64/fpu/test-float-libmvec-tanf.c > LGTM. Reviewed-by: H.J. Lu Thanks. H.J.