From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by sourceware.org (Postfix) with ESMTPS id 350B23858C27 for ; Tue, 4 Jan 2022 01:33:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 350B23858C27 Received: by mail-pf1-x432.google.com with SMTP id u20so30797873pfi.12 for ; Mon, 03 Jan 2022 17:33:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=8wEAQNPEN6Lkpj61k4MJapEsZST3QQL0Gg2yXLVJ7Gs=; b=62tB815W85Vf2DXB1vd/HQdd8jtUtxb8L9J0B+BBy9Ub1iYWeeqpfyfeeLydLVc0Hy EBBgV2GQziiPWs8xZMRsjFZWe14G8/OEjy3w4bDsmQhAwSnYDZqBSgok8pinplOxWRMz ilddflwa7mDRk2IQsE46a0jj09paPiYGv7ZjKsFaSGn13xeGvQngqv/YGlLw6qv/M1Zl +hNegOcRhN2Q6wzd35+h8ApHoE2QtLNQMpFeBANpR6j57HHEB+aFbE8PV/OikVFS5U8D LKH1lTO7Pansl4tJIpJetaHXYFKejiuRb5jwc2k/FV1COs/wNqHSTKwh57HobqzmfImn Fbeg== X-Gm-Message-State: AOAM533jn9T+PVMOOtLVuwEUQSHVwo8QuTgJ4dQX46eu8rePdYQV49kd 1DUnk59ZBORjZVvfclRhVPEX3Wh9LgY= X-Google-Smtp-Source: ABdhPJyZbyPswadQIsCsIRnrCYphidTDmdl4wQj3JQ0Ao0dsp9H0BGsCzubpogU24Q6P+uViMzB4HQ== X-Received: by 2002:a63:c54:: with SMTP id 20mr41608206pgm.505.1641260021347; Mon, 03 Jan 2022 17:33:41 -0800 (PST) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id f7sm39168034pfe.71.2022.01.03.17.33.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jan 2022 17:33:40 -0800 (PST) Date: Tue, 4 Jan 2022 10:33:38 +0900 From: Stafford Horne To: Adhemerval Zanella Cc: GLIBC patches , Openrisc Subject: Re: [PATCH v4 06/13] or1k: Atomics and Locking primitives Message-ID: References: <20211229044251.2203653-1-shorne@gmail.com> <20211229044251.2203653-7-shorne@gmail.com> <6b470dfe-f1f5-68b5-e8da-54a494d67d5e@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6b470dfe-f1f5-68b5-e8da-54a494d67d5e@linaro.org> X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Jan 2022 01:33:44 -0000 On Mon, Jan 03, 2022 at 03:20:15PM -0300, Adhemerval Zanella wrote: > LGTM with the fix below. > > Reviewed-by: Adhemerval Zanella Thank you. > On 29/12/2021 01:42, Stafford Horne via Libc-alpha wrote: > > --- > > sysdeps/or1k/atomic-machine.h | 79 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 79 insertions(+) > > create mode 100644 sysdeps/or1k/atomic-machine.h > > > > diff --git a/sysdeps/or1k/atomic-machine.h b/sysdeps/or1k/atomic-machine.h > > new file mode 100644 > > index 0000000000..1e306ae4ef > > --- /dev/null > > +++ b/sysdeps/or1k/atomic-machine.h > > @@ -0,0 +1,79 @@ > > +/* Atomic operations. OpenRISC version. > > + Copyright (C) 2021 Free Software Foundation, Inc. > > + This file is part of the GNU C Library. > > + > > + The GNU C Library is free software; you can redistribute it and/or > > + modify it under the terms of the GNU Lesser General Public > > + License as published by the Free Software Foundation; either > > + version 2.1 of the License, or (at your option) any later version. > > + > > + The GNU C Library is distributed in the hope that it will be useful, > > + but WITHOUT ANY WARRANTY; without even the implied warranty of > > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > > + Lesser General Public License for more details. > > + > > + You should have received a copy of the GNU Lesser General Public > > + License along with the GNU C Library. If not, see > > + . */ > > + > > +#ifndef __OR1K_ATOMIC_H_ > > +#define __OR1K_ATOMIC_H_ > > + > > +#include > > + > > +typedef int32_t atomic32_t; > > +typedef uint32_t uatomic32_t; > > + > > +typedef intptr_t atomicptr_t; > > +typedef uintptr_t uatomicptr_t; > > +typedef intmax_t atomic_max_t; > > +typedef uintmax_t uatomic_max_t; > > There are not required any longer. OK. > > + > > +#define __HAVE_64B_ATOMICS 0 > > +#define USE_ATOMIC_COMPILER_BUILTINS 1 > > +#define ATOMIC_EXCHANGE_USES_CAS 1 > > + > > +#define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \ > > + (abort (), 0) > > + > > +#define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \ > > + (abort (), 0) > > + > > +#define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \ > > + ({ \ > > + typeof (*mem) __oldval = (oldval); \ > > + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ > > + model, __ATOMIC_RELAXED); \ > > + }) > > + > > +#define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \ > > + (abort (), 0) > > + > > +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ > > + (abort (), (__typeof (*mem)) 0) > > + > > +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ > > + (abort (), (__typeof (*mem)) 0) > > + > > +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ > > + ({ \ > > + typeof (*mem) __oldval = (oldval); \ > > + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ > > + model, __ATOMIC_RELAXED); \ > > + __oldval; \ > > + }) > > + > > +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ > > + (abort (), (__typeof (*mem)) 0) > > + > > +#define atomic_compare_and_exchange_bool_acq(mem, new, old) \ > > + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ > > + mem, new, old, __ATOMIC_ACQUIRE) > > + > > +#define atomic_compare_and_exchange_val_acq(mem, new, old) \ > > + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ > > + mem, new, old, __ATOMIC_ACQUIRE) > > + > > +#define atomic_full_barrier() ({ asm volatile ("l.msync" ::: "memory"); }) > > + > > +#endif /* atomic-machine.h */