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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Apr 2024 14:50:14.0901 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a8417571-f574-4ec4-1b9d-08dc557fb38b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF0001E9BF.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR08MB9591 X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The 04/05/2024 12:16, Florian Weimer wrote: > This prints some information from struct cpu_features, and the midr_el1 > and dczid_el0 system register contents on every CPU. thanks. i think we already rely on zva size to be the same across all cores (in memset) and i don't think linux allows different dczid_el0 per core (even if somebody built such a system). so i don't think that is needed. ... > +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c > @@ -0,0 +1,84 @@ > +/* Print CPU diagnostics data in ld.so. AArch64 version. > + Copyright (C) 2021-2024 Free Software Foundation, Inc. > + This file is part of the GNU C Library. > + > + The GNU C Library is free software; you can redistribute it and/or > + modify it under the terms of the GNU Lesser General Public > + License as published by the Free Software Foundation; either > + version 2.1 of the License, or (at your option) any later version. > + > + The GNU C Library is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + Lesser General Public License for more details. > + > + You should have received a copy of the GNU Lesser General Public > + License along with the GNU C Library; if not, see > + . */ > + > +#include > + > +#include > +#include > +#include > +#include > + > +static void > +print_cpu_features_value (const char *label, uint64_t value) > +{ > + _dl_printf ("aarch64.cpu_features."); > + _dl_diagnostics_print_labeled_value (label, value); > +} > + > +static void > +print_per_cpu_value (const struct dl_iterate_cpu *dic, > + const char *label, uint64_t value) > +{ > + _dl_printf ("aarch64.processor[0x%x].", dic->processor_index); > + _dl_diagnostics_print_labeled_value (label, value); > +} > + > +void > +_dl_diagnostics_cpu (void) > +{ > + print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti); > + print_cpu_features_value ("midr_el1", > + GLRO (dl_aarch64_cpu_features).midr_el1); > + print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops); > + print_cpu_features_value ("mte_state", > + GLRO (dl_aarch64_cpu_features).mte_state); > + print_cpu_features_value ("prefer_sve_ifuncs", > + GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs); > + print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve); > + print_cpu_features_value ("zva_size", > + GLRO (dl_aarch64_cpu_features).zva_size); i would use something like const struct cpu_features *p = &GLRO (dl_aarch64_cpu_features); ... p->bti ... or even #define P(x) print_cpu_features_value (#x, GLRO (dl_aarch64_cpu_features).x) to make this list more compact. i wonder if we should place a comment in init-arch.h to update _dl_diagnostics_cpu in case ifunc rules change as this seems easy to forget > + > + struct dl_iterate_cpu dic; > + _dl_iterate_cpu_init (&dic); > + > + while (_dl_iterate_cpu_next (&dic)) > + { > + if (dic.requested_cpu >= 0) > + _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n", > + dic.processor_index, dic.requested_cpu); > + if (dic.actual_cpu >= 0) > + _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n", > + dic.processor_index, dic.actual_cpu); > + if (dic.actual_node >= 0) > + _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n", > + dic.processor_index, dic.actual_node); > + > + if (GLRO (dl_hwcap) & HWCAP_CPUID) > + { > + uint64_t midr_el1; > + asm ("mrs %0, midr_el1" : "=r" (midr_el1)); > + print_per_cpu_value (&dic, "midr_el1", midr_el1); > + } > + > + { > + uint64_t dczid_el0; > + asm ("mrs %0, dczid_el0" : "=r" (dczid_el0)); > + print_per_cpu_value (&dic, "dczid_el0", dczid_el0); > + } > + } > +} > -- > 2.44.0 >