From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27552 invoked by alias); 22 May 2017 14:54:00 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 27541 invoked by uid 89); 22 May 2017 14:53:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS,URIBL_RED autolearn=ham version=3.3.2 spammy=H*Ad:U*roland, Hx-languages-length:1378 X-HELO: relay1.mentorg.com Date: Mon, 22 May 2017 14:54:00 -0000 From: Joseph Myers To: Matt Turner CC: Florian Weimer , Zack Weinberg , GNU C Library , Roland McGrath Subject: Re: [PATCH 2/2] Remove vestiges of NaCl port from ARM assembly files. In-Reply-To: Message-ID: References: <20170512003750.27215-1-zackw@panix.com> <20170512003750.27215-2-zackw@panix.com> <8f3bad76-14a6-5d5c-9a3b-e6e94beef5f8@redhat.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-ClientProxiedBy: svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) To SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) X-SW-Source: 2017-05/txt/msg00655.txt.bz2 On Sat, 20 May 2017, Matt Turner wrote: > > (There are several other defines in sysdeps/arm/nacl/arm-features.h that > > are never defined for non-NaCl, or have constant definitions for non-NaCl > > - ARM_ALWAYS_BX, ARM_BX_ALIGN_LOG2, ARM_NO_INDEX_REGISTER - and which > > should probably be cleaned up as well eventually in separate patches, but > > the sfi_* are by far the most invasive. ARM_ASSUME_NO_IWMMXT is only > > defined for NaCl at present, but logically could be defined for all builds > > for ARMv6 and later (__ARM_ARCH >= 6, given GCC 4.8 or later or the > > __ARM_ARCH emulation in sysdep.h) as iWMMXt is only on certain v5TE > > processors. NO_THUMB is more complicated in that only NaCl defines it in > > arm-features.h, but some individual .S files define it as well.) > > Some Marvell CPUs have iwMMXt, like the one in the OLPC XO 1.75. It's am > ARMv7. Thanks for the information - I was going based on what GCC knows about CPUs with iwMMXt. ARMv8 removes the generic coprocessor specification, only allowing coprocessor instructions with certain ARM-defined coprocessor numbers, so I presume we can consider iwMMXt to be inherently incompatible with the v8 architecture, and so define ARM_ASSUME_NO_IWMMXT when building for 32-bit ARMv8. -- Joseph S. Myers joseph@codesourcery.com