From: Joseph Myers <joseph@codesourcery.com>
To: Tulio Magno Quites Machado Filho <tuliom@ascii.art.br>
Cc: Paul Zimmermann <Paul.Zimmermann@inria.fr>, <fweimer@redhat.com>,
<libc-alpha@sourceware.org>
Subject: Re: use of fma
Date: Wed, 28 Apr 2021 17:46:03 +0000 [thread overview]
Message-ID: <alpine.DEB.2.22.394.2104281740390.115529@digraph.polyomino.org.uk> (raw)
In-Reply-To: <87fszaza3v.fsf@linux.ibm.com>
On Wed, 28 Apr 2021, Tulio Magno Quites Machado Filho via Libc-alpha wrote:
> Paul Zimmermann <Paul.Zimmermann@inria.fr> writes:
>
> >> Side note: single and double-precision multiply-add have been available since
> >> the PPC ISA and POWER1 ISA respectively.
> >> So, they're also available by default on powerpc64 and powerpc builds
> >> supporting hw fpu.
> >
> > thank you Tulio Magno. By the way, does anyone know of any hardware with
> > extended double and/or quadruple precision multiply-add?
>
> That's a good example of FMA that is not available by default on any of the
> ABIs because it has been added to the POWER ISA 3.0 (e.g. POWER9). :-D
And ia64 can do fma for the ldbl-96 format (with an optional narrowing of
the infinite-precision result to binary32 or binary64 included in the
operation). RISC-V defines a 'Q' extension for binary128 arithmetic which
includes fma, but I don't know of any implementations of that 'Q'
extension (and it's not supported in GCC, for example).
--
Joseph S. Myers
joseph@codesourcery.com
prev parent reply other threads:[~2021-04-28 17:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-28 7:23 Paul Zimmermann
2021-04-28 8:25 ` Florian Weimer
2021-04-28 8:42 ` Paul Zimmermann
2021-04-28 9:06 ` Florian Weimer
2021-04-28 17:29 ` Joseph Myers
2021-04-28 15:00 ` Tulio Magno Quites Machado Filho
2021-04-28 15:18 ` Paul Zimmermann
2021-04-28 15:45 ` Tulio Magno Quites Machado Filho
2021-04-28 17:46 ` Joseph Myers [this message]
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