From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa4.mentor.iphmx.com (esa4.mentor.iphmx.com [68.232.137.252]) by sourceware.org (Postfix) with ESMTPS id 58BE13858422 for ; Thu, 18 Nov 2021 22:28:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 58BE13858422 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com IronPort-SDR: QKo76OFmHYfNsuJDWvpgxdR0Z8CnhdvF+ms8T8OfvceSXgBcsMOHHpHzHoy4sk4lFFPJJmS5i2 vVzjEB5R5t7U4VhOmq3pcGhBjVn8CDjs6HMmBOE0UWT0SzKsRP//goDHv5Y8nTvX5HAE0GJmrT lA5gnqVkiUhueJ7vQrzgbqYe3SiLPSRhNs+1P2tm5nNnt4+UX3sX+zjMZQHCMc4DjwZrngAl2f pBpnTVIvb88sJ+yeHTtlWvVpZr2ZViVpeVr/IP099rVYhoVM4PzKd+86TpmdKfNUUjtOkUZhFU ZCG/9nvSyMM2TjH3R3vv0Xmj X-IronPort-AV: E=Sophos;i="5.87,246,1631606400"; d="scan'208";a="68678514" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa4.mentor.iphmx.com with ESMTP; 18 Nov 2021 14:28:09 -0800 IronPort-SDR: mYf025T1uTlCRVOHpJcW5S4k9TOWIBO7g2CRmVK2dA0ocTdI5ZJ6eqrGMSubgTKPFwvPJ7ZK8q LaFwUo3FL73rEJQvEliTsu7CONP8yCXwhweQY+/qqmz9PyRX7ffY0FjL65/rhlz5Ac8ggWqcgw rf4IWkm14gTqzXtYhYEezhrWcYxoxR4LdKAEhrcZtsXlFOfgw37HXj+UwEqzQkpHqJQyl0jEoR gdSI2lE6BlKiA0oNAmVQbiVNybdIb/VW9Z+Asveyrp0poqjoL05ikmkJfU/JyRWwvsgSComfNI rYo= Date: Thu, 18 Nov 2021 22:28:03 +0000 From: Joseph Myers X-X-Sender: jsm28@digraph.polyomino.org.uk To: Stafford Horne CC: GLIBC patches , Openrisc Subject: Re: [PATCH v2 07/13] or1k: math soft float support In-Reply-To: <20211113031639.2402161-8-shorne@gmail.com> Message-ID: References: <20211113031639.2402161-1-shorne@gmail.com> <20211113031639.2402161-8-shorne@gmail.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-Spam-Status: No, score=-3122.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Nov 2021 22:28:11 -0000 On Sat, 13 Nov 2021, Stafford Horne via Libc-alpha wrote: > diff --git a/sysdeps/or1k/bits/fenv.h b/sysdeps/or1k/bits/fenv.h > new file mode 100644 > index 0000000000..49194ad851 > --- /dev/null > +++ b/sysdeps/or1k/bits/fenv.h > @@ -0,0 +1,68 @@ > +/* Copyright (C) 2021 Free Software Foundation, Inc. Missing one-line description at start of file. The constants you're defining here seem to be specific to hard float, but they're defined unconditionally. Is this because you use the same ABI for hard float and soft float (which is generally the case when such hard float constants might be defined for soft float as well - a soft float compilation could be using a hard float libc that supports those constants)? > +/* Define bits representing exceptions in the FPCSR status word. */ > +enum > + { > + FE_OVERFLOW = > +#define FE_OVERFLOW 1 << 3 Macros need to be properly surrounded by parentheses so they always group as a single operand in any expression. > +#define FP_EX_OVERFLOW 1 << 3 > +#define FP_EX_UNDERFLOW 1 << 4 > +#define FP_EX_INEXACT 1 << 8 > +#define FP_EX_INVALID 1 << 9 > +#define FP_EX_DIVZERO 1 << 11 Likewise in sfp-machine.h. -- Joseph S. Myers joseph@codesourcery.com