From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa3.hgst.iphmx.com (esa3.hgst.iphmx.com [216.71.153.141]) by sourceware.org (Postfix) with ESMTPS id 0628C3858D38 for ; Sat, 11 Jul 2020 00:49:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0628C3858D38 IronPort-SDR: fZclKlZxc4ZaOrLHL0vW9NecT2n2BrRR+LxAg4Xso+GCCyRCQxtEwBs3BcRwqh1/4BklmBnC7g 34ftlYnHkjgFCvPzC5SoDUihLAOuHUxTNrH7JlqjH/SyfdVWEuI56rEE/yYq9gtOAxiV4UdiF1 Z7WetsfLHJxSHJm2OMJk5JCiaap3XG4ikcUoZWI8CW2h2FrWgqOkYVOE9NyugOfLgbBotUGmL9 6dLdP4TZ+OlwJOagztMwT8pv4prPd3aNFLfuhz3whczBUcpO0dtQefi+jW0vaQJynQUaeg7Jaj OQE= X-IronPort-AV: E=Sophos;i="5.75,337,1589212800"; d="scan'208";a="146497878" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 11 Jul 2020 08:49:44 +0800 IronPort-SDR: cruR3oH5FOed/mThwDrCsDKMqYBWnYKIHdfvKS3doQ4RaWmTHytVg/jsoQ7sW8VAENTVB4hd9P 5hblaAG8KJRgfe7XWbXFHrNV1tnEOXIF0= Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2020 17:38:16 -0700 IronPort-SDR: Ik3uTF9tlrQ6LPts4Jt+LOf7G+25aU74QB8np5VsE0qg3KBfcHZXcovTxucVPq+ynhs7h958JV bkNkbfsfywbg== WDCIronportException: Internal Received: from unknown (HELO redsun52) ([10.149.66.28]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2020 17:49:42 -0700 Date: Sat, 11 Jul 2020 01:49:38 +0100 (BST) From: "Maciej W. Rozycki" To: Alistair Francis cc: libc-alpha@sourceware.org Subject: Re: [PATCH v2 10/18] RISC-V: Hard float support for 32-bit In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (LFD 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Jul 2020 00:49:45 -0000 On Wed, 3 Jun 2020, Alistair Francis via Libc-alpha wrote: > This patch contains hardware floating-point support for the RV32IF and > RV32IFD Full stop please. > diff --git a/sysdeps/riscv/rv32/rvd/s_lrint.c b/sysdeps/riscv/rv32/rvd/s_lrint.c > new file mode 100644 > index 0000000000..df406aacb6 > --- /dev/null > +++ b/sysdeps/riscv/rv32/rvd/s_lrint.c > @@ -0,0 +1,31 @@ > +/* lrint(). RISC-V version. I think this has to mention this is the 32-bit version somehow, like "32-bit RISC-V" or suchlike ("RV32" might be too cryptic/slang). Feel free to find a better wording (I'm not particularly happy to start a sentence with a number). > + Copyright (C) 2017-2020 Free Software Foundation, Inc. Again, 2020 only, and likewise throughout. Also I missed one case in 01/18 and may have elsewhere, please double-check the remaining patches. Otherwise OK as far as code already proposed for this change is concerned. What about the other math functions though? We have a lot of optimised versions in `sysdeps/riscv/rv64/rv{f,d}/', which seem suitable for RV32 as it stands, such as `s_llrintf.c' or `s_nearbyint.c'. Instead we build generic `sysdeps/ieee754/{flt-32,dbl-64}/' variants. Shouldn't we also move the XLEN-agnostic optimised functions to `sysdeps/riscv/rv{f,d}/' with this change? I think we only need to keep those that use the `long int' type at the interface in the XLEN-specific directory. Maciej