From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) by sourceware.org (Postfix) with ESMTPS id 723C73857C5A for ; Sun, 12 Jul 2020 22:10:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 723C73857C5A IronPort-SDR: POd74QTQXl5QCKJiZS/SttR0BhmBAthocLr0TYswsqj+a1Exe3Q5xdFUlp7G8DiJwxF179qlc8 z7Cpaq1IL7s34NONPXRRKVCOZ0WAWHeqzzQiENVEwvxM/UniKS0jWniaB7y6QixqqHGkLaJI+m L+BYM0ghK6kVyPMlWBgizrqTDC4TTd2UbFOx68CG9+HwxGgplH1ELHcoElT2D4lvhlEDR81o/D ecHEJCFDjoh2LRSASX2FKhdL/3XbFhAjPJJcEeRvAssmYK2dKxTmW1mRF7lobvwknLmfNpTX8T 918= X-IronPort-AV: E=Sophos;i="5.75,345,1589212800"; d="scan'208";a="251520030" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 13 Jul 2020 06:10:11 +0800 IronPort-SDR: 1+RZWpbra2/18vLeeKORAHGz0Jjim8DLTtQmT03c6J6is2wV1lGqSSMd0JO97axXHWg1IoYctG f8sH/oCq9tFf72Ekzf2IUkh23/G3mPvTE= Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2020 14:58:41 -0700 IronPort-SDR: xar0KUzILCcTVv1IxWIzcYr9azPz+mA5WLRs0fm3wr+tce1UWRP+DTRXC6ECW52/i8fn0y0ig3 AT4z23apD1jA== WDCIronportException: Internal Received: from unknown (HELO redsun52) ([10.149.66.28]) by uls-op-cesaip01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2020 15:10:11 -0700 Date: Sun, 12 Jul 2020 23:10:06 +0100 (BST) From: "Maciej W. Rozycki" To: Alistair Francis cc: Alistair Francis , GNU C Library Subject: Re: [PATCH v2 10/18] RISC-V: Hard float support for 32-bit In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (LFD 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 12 Jul 2020 22:10:14 -0000 On Sun, 12 Jul 2020, Alistair Francis wrote: > > I don't think there is a simple alternative available for RV32 that would > > be worth keeping together with the RV64 variant. Did I miss anything? > > What instruction(s) do you have in mind? > > Something like this for the generic RISC-V lround: > > long int > __lroundf (float x) > { > #if __WORDSIZE == 64 > int64_t res; > asm ("fcvt.l.s %0, %1, rmm" : "=r" (res) : "f" (x)); > #else > int32_t res; > asm ("fcvt.w.s %0, %1, rmm" : "=r" (res) : "f" (x)); > #endif > return res; > } > > I'm not sure if it's clearer, but for some of the more complex > functions (roundeven for example) it might be easier. > > It also means if there is a bug fixed in one it'll end up fixed for both. Ah, you mean the `float' to `long int' conversion functions, necessarily ABI-specific due to the changing width of the latter data type. Well, I meant the operations involving FCVT.L.D/FCVT.D.L. I can see no RISC-V solution for them that would surpass the generic implementation. As far as your example above is concerned if we decided to merge the files at all, I would reduce it to: #if __WORDSIZE == 64 # define OP "fcvt.l.s" #elif __WORDSIZE == 32 # define OP "fcvt.w.s" #else # error Unsupported #endif long int __lroundf (float x) { long int res; asm (OP "\t%0, %1, rmm" : "=r" (res) : "f" (x)); return res; } or suchlike (I'm not sure if there's any gain here from `res' having an explicit-width data type). Likewise with the rest. Maciej