From: Adhemerval Zanella <adhemerval.zanella@linaro.org>
To: Huang Pei <huangpei@loongson.cn>, Joseph Myers <joseph@codesourcery.com>
Cc: Huacai Chen <chenhc@lemote.com>,
Chenghua Xu <xuchenghua@loongson.cn>,
libc-alpha <libc-alpha@sourceware.org>
Subject: Re: [PATCH 3/3] mips: remove register spill
Date: Mon, 30 Nov 2020 11:22:03 -0300 [thread overview]
Message-ID: <b1523d44-fd02-e32a-2bf9-7ec662552748@linaro.org> (raw)
In-Reply-To: <20201128081817.15463-4-huangpei@loongson.cn>
On 28/11/2020 05:18, Huang Pei wrote:
> Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
> "li v0, #sys_number") right precedes "syscall", so the kernel syscall
> restart sequence can use CP0 EPC - 4 to restart the syscall, because
> kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
> this restriction.
>
> See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
>
> Since glibc-2.24 the minimum kernel version is 3.2(much higer than
> 2.6.36), I think it is OK to remove the ugly register spill in
> syscall.S just because of the old convention
>
> Signed-off-by: Huang Pei <huangpei@loongson.cn>
We do not use SCO, but rather Copyright assignment.
The rest of the patch looks ok.
> ---
> sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> index aab1f389aa..089524a40b 100644
> --- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> +++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> @@ -27,14 +27,9 @@
>
> .text
> NESTED (syscall, SZREG, ra)
> - .mask 0x00010000, -2 * SZREG
> + .mask 0x00000000, 0
> .fmask 0x00000000, 0
> - PTR_ADDIU sp, -2 * SZREG
> - cfi_adjust_cfa_offset (2 * SZREG)
> - REG_S s0, (sp)
> - cfi_rel_offset (s0, 0)
> -
> - move s0, a0
> + move v0, a0
> move a0, a1 /* shift arg1 - arg7. */
> move a1, a2
> move a2, a3
> @@ -43,13 +38,8 @@ NESTED (syscall, SZREG, ra)
> move a5, a6
> move a6, a7
>
> - move v0, s0 /* Syscall number -> v0 */
> syscall /* Do the system call. */
>
> - REG_L s0, (sp)
> - cfi_restore (s0)
> - PTR_ADDIU sp, 2 * SZREG
> - cfi_adjust_cfa_offset (-2 * 2 * SZREG)
> bne a3, zero, L(error)
>
> ret
>
next prev parent reply other threads:[~2020-11-30 14:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-28 8:18 [Patch V3]: add hp-timing support and minor fix Huang Pei
2020-11-28 8:18 ` [PATCH 1/3] mips: add hp-timing support for MIPS R2 Huang Pei
2020-11-30 12:25 ` Adhemerval Zanella
2020-12-04 10:58 ` Maciej W. Rozycki
2020-12-04 12:31 ` Adhemerval Zanella
2020-11-28 8:18 ` [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32 Huang Pei
2020-11-30 13:03 ` Adhemerval Zanella
2020-12-04 10:57 ` Maciej W. Rozycki
2020-12-04 12:32 ` Adhemerval Zanella
2020-11-28 8:18 ` [PATCH 3/3] mips: remove register spill Huang Pei
2020-11-30 14:22 ` Adhemerval Zanella [this message]
2020-12-01 9:39 ` Huang Pei
2020-12-01 11:58 ` Adhemerval Zanella
2020-12-04 11:03 ` Maciej W. Rozycki
2020-12-04 12:33 ` Adhemerval Zanella
-- strict thread matches above, loose matches on Subject: below --
2020-11-27 9:22 [Patch V2]: add hp-timing support and fix syscall.S Huang Pei
2020-11-27 9:22 ` [PATCH 3/3] mips: remove register spill Huang Pei
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