From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10655 invoked by alias); 10 Dec 2018 18:12:54 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 10627 invoked by uid 89); 10 Dec 2018 18:12:52 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=H*f:sk:2018121, H*i:sk:2018121, 10122018, power6 X-HELO: mx0a-001b2d01.pphosted.com Subject: Re: [PATCH] power: Fix VSCR position on ucontext To: "Gabriel F. T. Gomes" Cc: Florian Weimer , libc-alpha@sourceware.org References: <8a619ad1-b7f2-04f8-f9a7-0a19cbf98f4c@linux.ibm.com> <87lg5va6a6.fsf@oldenburg.str.redhat.com> <20181116111825.43b60283@tereshkova.br.ibm.com> <5e1d1cab-7c91-90f8-82d2-fd38f8676f30@linux.ibm.com> <20181207162959.5e5d8933@tereshkova> <20181210153658.32b0e266@tereshkova> From: Rogerio Alves Date: Mon, 10 Dec 2018 18:25:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20181210153658.32b0e266@tereshkova> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit x-cbid: 18121018-2213-0000-0000-00000328B28D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010209; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000270; SDB=6.01129831; UDB=6.00587045; IPR=6.00909965; MB=3.00024644; MTD=3.00000008; XFM=3.00000015; UTC=2018-12-10 18:12:45 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18121018-2214-0000-0000-00005C8DF16A Message-Id: X-SW-Source: 2018-12/txt/msg00326.txt.bz2 Em 10-12-2018 15:36, Gabriel F. T. Gomes escreveu: > On Fri, 07 Dec 2018, Gabriel F. T. Gomes wrote: > >> On Fri, 07 Dec 2018, Rogerio Alves wrote: >> >>> +/* This test is supported only on POWER 5 or higher. */ >>> +#define PPC_CPU_SUPPORTED (PPC_FEATURE_POWER5 | PPC_FEATURE_POWER5_PLUS | \ >>> + PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | \ >>> + PPC_FEATURE2_ARCH_2_07) >> >> Is this actually needed? Glibc has code to fill all the bits for older >> architectures in sysdeps/powerpc/hwcapinfo.c [1]. So, as far as I can >> see, you only need to test for AT_HWCAP & PPC_FEATURE_POWER5. >> >> [1] https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/powerpc/hwcapinfo.c;h=a09b18309324423d0cdf04e88367899a4396bab7;hb=HEAD#l47 > > Hrm, that's only true for the hwcap info that is copied into the TCB, not > when accessing it with getauxval, so my comment is wrong (as Rogerio > kindly pointed out to me in a private message... thanks). > > So, nevermind this comment. > > > On the other hand, on powerpc64 builds configured with --with-cpu set to > power4, power5, and power6, (but not to power8 or power7), I got the > following error message: > > ../sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c: In function ‘do_test’: > ../sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:51:3: error: inconsistent operand constraints in an ‘asm’ > asm volatile ("vspltisb %0,0\n" > ^~~ > Oh Ok I'll make some tests here. Thanks. > I guess we didn't get this error message before, because of the > `#ifdef ARCH_PWR8' statement. So, unless you know a better way to fix > this, you should reintroduce the `#ifdef' statement (now, you could use > ARCH_PWR7). >