Re: [PATCH 1/3] Guess L1 cache linesize for aarch64

[Siddhesh Poyarekar <siddhesh@gotplt.org>]

On Tuesday 10 October 2017 04:31 PM, Szabolcs Nagy wrote:
>> Applications may use these hints to try and align their code/data
>> suitably or read/write data in an optimal manner.  It needs to be
> 
> that's different from the given libgcc clear_cache example

Line sizes reported by ctr_el0 must be usable for clearing/invalidating
cache lines in a loop so it should be compatible with that use case too.

> either there is existing meaning or it's a new api with
> some proposed meaning, i wanted to look at that to tell
> if the implementation is acceptable.

This is an old API and the existing meaning is literally what it says,
the size of the L1 cache line.  There is no specification defining what
it can or cannot be used for since it is a GNU extension.

To comply with the name 1:1 we would have to emulate reeading clidr_el1,
ccsidr_el1, etc. which is overkill given that the value returned is
valid for almost everything.  The only place it goes wrong is where an
application might use it to report system architecture and that's where
we need to add a documentation snippet stating that it isn't quite what
it says it is, but is close.

The other alternative is to never implement this information on aarch64,
which is potentially sub-optimal for all of the other use cases.

Siddhesh