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From: Adhemerval Zanella <adhemerval.zanella@linaro.org>
To: Szabolcs Nagy <szabolcs.nagy@arm.com>
Cc: libc-alpha@sourceware.org, jma14 <jma14@rice.edu>,
	John Mellor-Crummey <johnmc@rice.edu>
Subject: Re: [PATCH v9 4/4] elf: Fix runtime linker auditing on aarch64 (BZ #26643)
Date: Tue, 11 Jan 2022 15:12:04 -0300	[thread overview]
Message-ID: <c263f2d9-74c2-1c9a-a578-9a71bdc1ab3a@linaro.org> (raw)
In-Reply-To: <20220111170944.GZ3294453@arm.com>



On 11/01/2022 14:09, Szabolcs Nagy wrote:
> The 01/11/2022 13:49, Adhemerval Zanella wrote:
>> On 11/01/2022 08:16, Szabolcs Nagy wrote:
>>> The 01/03/2022 10:25, Adhemerval Zanella via Libc-alpha wrote:
>>>> @@ -142,13 +143,17 @@ _dl_runtime_profile:
>>>>  	   Stack frame layout:
>>>>  	   [sp,   #...] lr
>>>>  	   [sp,   #...] &PLTGOT[n]
>>>> -	   [sp,    #96] La_aarch64_regs
>>>> -	   [sp,    #48] La_aarch64_retval
>>>> -	   [sp,    #40] frame size return from pltenter
>>>> -	   [sp,    #32] dl_profile_call saved x1
>>>> -	   [sp,    #24] dl_profile_call saved x0
>>>> -	   [sp,    #16] t1
>>>> -	   [sp,     #0] x29, lr   <- x29
>>>> +	   -----------------------
>>>> +	   [sp,   #384] La_aarch64_regs::lr_xreg (x0-x8)
>>>> +	   [sp,   #256] La_aarch64_regs::lr_vreg (q0-q7)
>>>> +	   [sp,   #240] La_aarch64_regs::sp and La_aarch64_regs::lr
>>>> +	   [sp,   #176] La_aarch64_retval::lrv_xreg (x0-x7)
>>>> +	   [sp,   # 48] La_aarch64_retval::lrv_vreg (q0-q7)
>>>> +	   [sp,   # 40] frame size return from pltenter
>>>> +	   [sp,   # 32] dl_profile_call saved x1
>>>> +	   [sp,   # 24] dl_profile_call saved x0
>>>> +	   [sp,   # 16] t1
>>>> +	   [sp,   #  0] x29, lr   <- x29
>>>>  	 */
>>>
>>> the layout in the comment looks backwards.
>>
>> It follows the convention of the about layout:
>>
>>         /* AArch64 we get called with:
>>            ip0          &PLTGOT[2]
>>            ip1          temp(dl resolver entry point)
>>            [sp, #8]     lr
>>            [sp, #0]     &PLTGOT[n]
>> 	[...]
>>
> 
> i mean the order of the fields is wrong.
> 
> lr_xreg has larger address than lr_vreg
> but in the struct it is the opposite.
> 
> i think you need to reorder the fields.
> (but we don't have to document the exact offsets
> here, so a simplified comment is fine too)

Indeed, it should be:

           [sp,   #384] La_aarch64_regs::lr_xreg (q0-q7)
           [sp,   #256] La_aarch64_regs::lr_vreg (x0-x8)
           [sp,   #240] La_aarch64_regs::sp and La_aarch64_regs::lr
           [sp,   #176] La_aarch64_retval::lrv_xreg (q0-q7)
           [sp,    #48] La_aarch64_retval::lrv_vreg (x0-x7)
           [sp,    #40] frame size return from pltenter
           [sp,    #32] dl_profile_call saved x1
           [sp,    #24] dl_profile_call saved x0
           [sp,    #16] t1
           [sp,     #0] x29, lr   <- x29

I have fixed it.

  reply	other threads:[~2022-01-11 18:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-03 13:25 [PATCH v9 0/4] Multiple rtld-audit fixes Adhemerval Zanella
2022-01-03 13:25 ` [PATCH v9 1/4] elf: Add la_activity during application exit Adhemerval Zanella
2022-01-04 17:13   ` Jonathon Anderson
2022-01-03 13:25 ` [PATCH v9 2/4] elf: Fix initial-exec TLS access on audit modules (BZ #28096) Adhemerval Zanella
2022-01-03 13:25 ` [PATCH v9 3/4] elf: Issue la_symbind for bind-now (BZ #23734) Adhemerval Zanella
2022-01-03 13:25 ` [PATCH v9 4/4] elf: Fix runtime linker auditing on aarch64 (BZ #26643) Adhemerval Zanella
2022-01-11 11:16   ` Szabolcs Nagy
2022-01-11 16:49     ` Adhemerval Zanella
2022-01-11 17:09       ` Szabolcs Nagy
2022-01-11 18:12         ` Adhemerval Zanella [this message]
2022-01-13 16:24           ` Szabolcs Nagy

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