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* nearbyint(double) on aarch64 vs. riscv
@ 2020-07-20 19:00 Vineet Gupta
  2020-07-20 19:43 ` Adhemerval Zanella
  0 siblings, 1 reply; 5+ messages in thread
From: Vineet Gupta @ 2020-07-20 19:00 UTC (permalink / raw)
  To: libc-alpha @ sourceware . org; +Cc: Joseph Myers, Szabolcs Nagy

Hi,

I'm curious about the codegen for nearbyint() on aarc64.
From a build of off of build-many-glibc.py I see:

000000000003c8e8 <nearbyint>:
   3c8e8:	frinti	d0, d0
   3c8ec:	ret

vs. rv64imafdc

0000000000030ff8 <nearbyint>:
   30ff8:	*frflags*	a4
   30ffc:	feq.d	a5,fa0,fa0
   31000:	fabs.d	fa5,fa0
   31004:	beqz	a5,31026 <nearbyint+0x2e>
   31006:	auipc	a5,0x43
   3100a:	fld	fa4,-694(a5) # 73d50 <factor+0x28>
   3100e:	flt.d	a5,fa5,fa4
   31012:	beqz	a5,31024 <nearbyint+0x2c>
   31014:	fcvt.l.d	a5,fa0
   31018:	fcvt.d.l	fa5,a5
   3101c:	fsgnj.d	fa0,fa5,fa0
   31020:	*fsflags*	a4
   31024:	ret
   31026:	fadd.d	fa0,fa0,fa0
   3102a:	ret

So RISCV is using the conversion instructions and also disabling the FPU
exceptions around the math code.

AARCH64 uses FRINTI instruction which per [1] can generate exceptions (atleast set
flags in FPSR). Isn't the code supposed to wrap __builtin_nearbyint() with
feholdexcept() / fesetenv().

I'm assuming FPU flags are callee preserved since the caller may not know what
goes down the rabbit hole ?

[1] ARM compiler asm user guide https://developer.arm.com/documentation/dui0802/a/

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-07-21 20:26 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-20 19:00 nearbyint(double) on aarch64 vs. riscv Vineet Gupta
2020-07-20 19:43 ` Adhemerval Zanella
2020-07-20 19:52   ` Joseph Myers
2020-07-21 20:03     ` Vineet Gupta
2020-07-21 20:26       ` Joseph Myers

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