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Mon, 06 Nov 2023 08:17:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IHmdewNLm1q0iaRfebAN5hLRuf7FbF2AxKL+iZhusjCtI3el8hvF4KmRr9AQQ0MjzSIw9Okgw== X-Received: by 2002:ad4:5d4f:0:b0:674:4ef3:d71f with SMTP id jk15-20020ad45d4f000000b006744ef3d71fmr22641253qvb.45.1699287438492; Mon, 06 Nov 2023 08:17:18 -0800 (PST) Received: from [192.168.0.241] ([198.48.244.52]) by smtp.gmail.com with ESMTPSA id c12-20020a0ce7cc000000b0066cfadfb796sm3524143qvo.107.2023.11.06.08.17.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Nov 2023 08:17:18 -0800 (PST) Message-ID: Date: Mon, 6 Nov 2023 11:17:17 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v2 4/7] manual: Clarify undefined behavior of feenableexcept (BZ 31019) To: Adhemerval Zanella , libc-alpha@sourceware.org, Bruno Haible References: <20231106132713.953501-1-adhemerval.zanella@linaro.org> <20231106132713.953501-5-adhemerval.zanella@linaro.org> From: Carlos O'Donell Organization: Red Hat In-Reply-To: <20231106132713.953501-5-adhemerval.zanella@linaro.org> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/6/23 08:27, Adhemerval Zanella wrote: > From: Bruno Haible > > Explain undefined behavior of feenableexcept in a special case. LGTM. Reviewed-by: Carlos O'Donell > --- > manual/arith.texi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/manual/arith.texi b/manual/arith.texi > index fa7110e992..be24c20493 100644 > --- a/manual/arith.texi > +++ b/manual/arith.texi > @@ -1176,6 +1176,12 @@ enabled, the status of the other exceptions is not changed. > > The function returns the previous enabled exceptions in case the > operation was successful, @code{-1} otherwise. > + > +Note: Enabling traps for an exception for which the exception flag is > +currently already set (@pxref{Status bit operations}) has unspecified > +consequences: it may or may not trigger a trap immediately. Agreed. > +@c It triggers a trap immediately on powerpc*, at the next floating- > +@c instruction on i386, and not at all on the other CPUs. > @end deftypefun > > @deftypefun int fedisableexcept (int @var{excepts}) -- Cheers, Carlos.