From: Zong Li <zong@andestech.com>
To: <joseph@codesourcery.com>, <libc-alpha@sourceware.org>,
<palmer@dabbelt.com>, <darius@bluespec.com>, <andrew@sifive.com>,
<dj@redhat.com>
Cc: <zongbox@gmail.com>, Zong Li <zong@andestech.com>
Subject: [PATCH 0/9] RISC-V glibc port for the 32 bit
Date: Thu, 12 Jul 2018 10:27:00 -0000 [thread overview]
Message-ID: <cover.1531384753.git.zong@andestech.com> (raw)
This patch set contains the glibc port for the 32 bit RISC-V. I ran the glibc
test suite on QEMU, and remained the failed cases which caused by environment
issue like 64 bit glibc port. In addition, there are some math test cases
need to be checked but it look unlike glibc's problem now.
There is another patch to fix the ld flags issue of tst-execstack-mod.so, it
cause the fail on some test cases on RISC-V.
Thanks everyone for the help and efforts of Palmer during this work.
Zong Li (9):
Documentation for the 32 bit RISC-V port
RISC-V: Add dynamic loader for the 32 bit
RISC-V: Add path of library directories for the 32 bit
RISC-V: The ABI implementation for the 32-bit
RISC-V: Hard float support for the 32 bit
RISC-V: Split the soft-fp into rv32 and rv64
RISC-V: Add ABI lists
RISC-V: Build Infastructure for the 32 bit
Add 32 bit RISC-V to build-many-glibcs.py
NEWS | 3 +
README | 1 +
scripts/build-many-glibcs.py | 15 +
sysdeps/riscv/bits/wordsize.h | 4 +-
sysdeps/riscv/nofpu/Implies | 1 -
sysdeps/riscv/nofpu/libm-test-ulps | 2198 --------------------
sysdeps/riscv/nofpu/libm-test-ulps-name | 1 -
sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 25 +-
sysdeps/riscv/preconfigure | 6 +-
sysdeps/riscv/rv32/Implies-after | 1 +
sysdeps/riscv/rv32/nofpu/Implies | 2 +
sysdeps/riscv/rv32/nofpu/libm-test-ulps | 534 +++++
sysdeps/riscv/rv32/nofpu/libm-test-ulps-name | 1 +
sysdeps/riscv/rv32/rvd/Implies | 3 +
sysdeps/riscv/rv32/rvd/libm-test-ulps | 1658 +++++++++++++++
sysdeps/riscv/rv32/rvd/libm-test-ulps-name | 1 +
sysdeps/riscv/rv32/rvd/s_lrint.c | 31 +
sysdeps/riscv/rv32/rvd/s_lround.c | 31 +
sysdeps/riscv/rv32/rvf/Implies | 1 +
sysdeps/riscv/rv32/rvf/s_lrintf.c | 31 +
sysdeps/riscv/rv32/rvf/s_lroundf.c | 31 +
sysdeps/riscv/rv64/nofpu/Implies | 1 +
sysdeps/riscv/rv64/nofpu/libm-test-ulps | 2198 ++++++++++++++++++++
sysdeps/riscv/rv64/nofpu/libm-test-ulps-name | 1 +
sysdeps/riscv/sfp-machine.h | 27 +-
sysdeps/riscv/sys/asm.h | 5 +-
sysdeps/unix/sysv/linux/riscv/Makefile | 4 +-
sysdeps/unix/sysv/linux/riscv/configure | 39 +
sysdeps/unix/sysv/linux/riscv/configure.ac | 8 +
sysdeps/unix/sysv/linux/riscv/dl-cache.h | 15 +-
sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +-
sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 +
sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data | 67 +
.../unix/sysv/linux/riscv/rv32/jmp_buf-macros.h | 53 +
sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist | 9 +
.../sysv/linux/riscv/rv32/libBrokenLocale.abilist | 1 +
sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist | 4 +
sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist | 2095 +++++++++++++++++++
.../unix/sysv/linux/riscv/rv32/libcrypt.abilist | 7 +
sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist | 9 +
sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist | 1021 +++++++++
sysdeps/unix/sysv/linux/riscv/rv32/libnsl.abilist | 120 ++
.../unix/sysv/linux/riscv/rv32/libpthread.abilist | 216 ++
.../unix/sysv/linux/riscv/rv32/libresolv.abilist | 79 +
sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist | 35 +
.../sysv/linux/riscv/rv32/libthread_db.abilist | 40 +
sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist | 6 +
sysdeps/unix/sysv/linux/riscv/rv32/lockf64.c | 70 +
sysdeps/unix/sysv/linux/riscv/shlib-versions | 4 +
49 files changed, 8506 insertions(+), 2212 deletions(-)
delete mode 100644 sysdeps/riscv/nofpu/Implies
delete mode 100644 sysdeps/riscv/nofpu/libm-test-ulps
delete mode 100644 sysdeps/riscv/nofpu/libm-test-ulps-name
create mode 100644 sysdeps/riscv/rv32/Implies-after
create mode 100644 sysdeps/riscv/rv32/nofpu/Implies
create mode 100644 sysdeps/riscv/rv32/nofpu/libm-test-ulps
create mode 100644 sysdeps/riscv/rv32/nofpu/libm-test-ulps-name
create mode 100644 sysdeps/riscv/rv32/rvd/Implies
create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps
create mode 100644 sysdeps/riscv/rv32/rvd/libm-test-ulps-name
create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c
create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c
create mode 100644 sysdeps/riscv/rv32/rvf/Implies
create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c
create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c
create mode 100644 sysdeps/riscv/rv64/nofpu/Implies
create mode 100644 sysdeps/riscv/rv64/nofpu/libm-test-ulps
create mode 100644 sysdeps/riscv/rv64/nofpu/libm-test-ulps-name
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libnsl.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/lockf64.c
--
2.7.4
next reply other threads:[~2018-07-12 10:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-12 10:27 Zong Li [this message]
2018-07-12 10:27 ` [PATCH 3/9] RISC-V: Add path of library directories " Zong Li
2018-07-12 10:27 ` [PATCH 6/9] RISC-V: Split the soft-fp into rv32 and rv64 Zong Li
2018-07-12 17:46 ` Richard Henderson
2018-07-13 1:00 ` Zong Li
2018-07-13 10:34 ` Richard Henderson
2018-07-13 13:19 ` Zong Li
2018-07-13 13:49 ` Richard Henderson
2018-07-13 13:55 ` Zong Li
2018-07-12 10:27 ` [PATCH 2/9] RISC-V: Add dynamic loader for the 32 bit Zong Li
2018-07-12 10:27 ` [PATCH 4/9] RISC-V: The ABI implementation for the 32-bit Zong Li
2018-07-12 10:27 ` [PATCH 1/9] Documentation for the 32 bit RISC-V port Zong Li
2018-07-12 10:27 ` [PATCH 8/9] RISC-V: Build Infastructure for the 32 bit Zong Li
2018-07-12 10:27 ` [PATCH 5/9] RISC-V: Hard float support " Zong Li
2018-07-12 10:27 ` [PATCH 9/9] Add 32 bit RISC-V to build-many-glibcs.py Zong Li
2018-07-12 10:28 ` [PATCH 7/9] RISC-V: Add ABI lists Zong Li
2018-07-31 18:49 ` [PATCH 0/9] RISC-V glibc port for the 32 bit Jim Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1531384753.git.zong@andestech.com \
--to=zong@andestech.com \
--cc=andrew@sifive.com \
--cc=darius@bluespec.com \
--cc=dj@redhat.com \
--cc=joseph@codesourcery.com \
--cc=libc-alpha@sourceware.org \
--cc=palmer@dabbelt.com \
--cc=zongbox@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).