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([2804:1b3:a7c3:a647:4493:5647:32ad:a4d8]) by smtp.gmail.com with ESMTPSA id h9-20020a170902f7c900b001b8a3e2c241sm6849plw.14.2023.10.26.11.39.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 Oct 2023 11:39:20 -0700 (PDT) Message-ID: Date: Thu, 26 Oct 2023 15:39:17 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] i686: Do not raise exception traps on fesetexcept (BZ 30989) Content-Language: en-US To: Bruno Haible , libc-alpha@sourceware.org References: <20231024113716.3911015-1-adhemerval.zanella@linaro.org> <20231024113716.3911015-3-adhemerval.zanella@linaro.org> <3864706.3VsfAaAtOV@nimes> From: Adhemerval Zanella Netto Organization: Linaro In-Reply-To: <3864706.3VsfAaAtOV@nimes> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 24/10/23 10:43, Bruno Haible wrote: > Looks all good, except for two comments: > > Adhemerval Zanella wrote: >> diff --git a/sysdeps/i386/fpu/fesetexcept.c b/sysdeps/i386/fpu/fesetexcept.c >> index 18949e982a..6eeb5ab5b0 100644 >> --- a/sysdeps/i386/fpu/fesetexcept.c >> +++ b/sysdeps/i386/fpu/fesetexcept.c >> @@ -17,15 +17,48 @@ >> . */ >> >> #include >> +#include >> >> int >> fesetexcept (int excepts) >> { >> - fenv_t temp; >> + /* The flags can be set in the 387 unit or in the SSE unit. To set a flag, >> + it is sufficient to do it in the SSE unit, because that is guaranteed to >> + not trap. However, on i386 CPUs that have only a 387 unit, set the flags >> + in the 387, as long as this cannot trap. */ >> >> - __asm__ ("fnstenv %0" : "=m" (*&temp)); >> - temp.__status_word |= excepts & FE_ALL_EXCEPT; >> - __asm__ ("fldenv %0" : : "m" (*&temp)); >> + excepts &= FE_ALL_EXCEPT; >> + >> + if (CPU_FEATURE_USABLE (SSE)) >> + { >> + /* And now similarly for SSE. */ >> + unsigned int mxcsr; >> + __asm__ ("stmxcsr %0" : "=m" (*&mxcsr)); > > The comment "And now similarly for SSE." is odd, since there was no similar code > before it. How about > /* Set the flags in the SSE unit. */ Ack. > >> + /* Set relevant flags. */ >> + mxcsr |= excepts; >> + >> + /* Put the new data in effect. */ >> + __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr)); >> + } >> + else >> + { >> + fenv_t temp; >> + >> + __asm__ ("fnstenv %0" : "=m" (*&temp)); >> + >> + /* Clear or set relevant flags. */ >> + temp.__status_word |= temp.__status_word & excepts; > > The comment here should be > /* Set relevant flags. */ > since here, unlike in fesetexceptflag(), we don't need to clear any flags. Ack. I changed both locally.