From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id EF5F03858C2D for ; Tue, 16 Aug 2022 01:29:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EF5F03858C2D Received: from [IPv6:240e:358:115c:cb00:dc73:854d:832e:2] (unknown [IPv6:240e:358:115c:cb00:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 2DBD66686B; Mon, 15 Aug 2022 21:29:04 -0400 (EDT) Message-ID: Subject: Re: [PATCH 1/1] LoongArch: Add pointer mangling support. From: Xi Ruoyao To: caiyinyu , adhemerval.zanella@linaro.org, libc-alpha@sourceware.org, i.swmail@xen0n.name Cc: xuchenghua@loongson.cn, joseph_myers@mentor.com Date: Tue, 16 Aug 2022 09:28:57 +0800 In-Reply-To: <20220811040056.3164122-1-caiyinyu@loongson.cn> References: <20220811040056.3164122-1-caiyinyu@loongson.cn> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.45.2 MIME-Version: 1.0 X-Spam-Status: No, score=0.6 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Aug 2022 01:29:13 -0000 On Thu, 2022-08-11 at 12:00 +0800, caiyinyu wrote: > +/* Load or store to/from a got-relative EXPR into/from G, using T. > +=C2=A0=C2=A0 Note G and T are register names.=C2=A0 */ > +#define LDST_GLOBAL(OP, G, T,=C2=A0 EXPR) \ > +=C2=A0 pcalau12i T, %got_pc_hi20(EXPR); \ > +=C2=A0 OP=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 T, T, %got_pc_lo12(EXPR); = \ Should this be "ld.d T, T, %got_pc_lo12(EXPR)"? Or if OP is a store we'll store into GOT and break it. Or if we don't need to support store just rename it to "LD_GLOBAL". > +=C2=A0 OP=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 G, T, 0; > + > +/* Load or store to/from a pc-relative EXPR into/from G, using T. > +=C2=A0=C2=A0 Note G and T are register names.=C2=A0 */ > +#define LDST_PCREL(OP, G, T,=C2=A0 EXPR) \ > +=C2=A0 pcalau12i T, %pc_hi20(EXPR); \ > +=C2=A0 OP=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 G, T, %pc_lo12(EXPR); --=20 Xi Ruoyao School of Aerospace Science and Technology, Xidian University