From: Adhemerval Zanella <adhemerval.zanella@linaro.org>
To: Florian Weimer <fweimer@redhat.com>,
Adhemerval Zanella via Libc-alpha <libc-alpha@sourceware.org>
Subject: Re: [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled
Date: Thu, 24 Jun 2021 09:07:34 -0300 [thread overview]
Message-ID: <d8b3344d-4417-c830-a532-012233c53fa3@linaro.org> (raw)
In-Reply-To: <87fsx7n1ag.fsf@oldenburg.str.redhat.com>
On 24/06/2021 04:56, Florian Weimer wrote:
> * Adhemerval Zanella via Libc-alpha:
>
>> + x86_cpu_AMD_IBPB = x86_cpu_index_80000008_ebx + 12,
>> + x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14,
>> + x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15,
>> + x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24,
>
> Do these show up as USABLE automatically? The test suggests to me that
> they do.
No, these are set not usable by CPU_FEATURE_USABLE. The test only checks
if kernel advertise through /proc/cpuinfo matches HAS_CPU_FEATURE.
>
> This points to a deeper problem elsewhere: new bits should not become
> available automatically, they must be copied over explicitly because
> ld.so does not know the semantics for a new bit in USABLE.
I think the cpu-features.c already does it for the usable fields. I tend
to agree that we should not enable unknown flags, we might now know prior
hand that a future flag might or not require glibc support.
prev parent reply other threads:[~2021-06-24 12:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 14:54 [PATCH] x86: Fix tst-cpu-features-cpuinfo on Ryzen 9 (BZ #27873) Adhemerval Zanella
2021-06-23 20:41 ` H.J. Lu
2021-06-23 21:15 ` Adhemerval Zanella
2021-06-23 21:36 ` [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled H.J. Lu
2021-06-24 0:30 ` Adhemerval Zanella
2021-06-24 0:40 ` H.J. Lu
2021-06-24 12:17 ` Adhemerval Zanella
2021-06-24 12:27 ` H.J. Lu
2021-06-24 12:55 ` Adhemerval Zanella
2021-06-24 7:56 ` Florian Weimer
2021-06-24 12:07 ` Adhemerval Zanella [this message]
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