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([2804:1b3:a7c1:6eb0:6d4f:92fe:5e4e:27d3]) by smtp.gmail.com with ESMTPSA id x4-20020a17090abc8400b00262eccfa29fsm13676461pjr.33.2023.09.27.09.56.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Sep 2023 09:56:50 -0700 (PDT) Message-ID: Date: Wed, 27 Sep 2023 13:56:47 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC. Content-Language: en-US To: Manjunath Matti , libc-alpha@sourceware.org Cc: rajis@linux.ibm.com, Carl Love References: <20230923154951.3783611-1-mmatti@linux.ibm.com> From: Adhemerval Zanella Netto Organization: Linaro In-Reply-To: <20230923154951.3783611-1-mmatti@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 23/09/23 12:49, Manjunath Matti wrote: > On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the > prologue get/save/set rounding mode operations for POWER9 and > later by using 'mffscrn' where possible, this was introduced by > commit f1c56cdff09f650ad721fae026eb6a3651631f3d. > > GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn > which now returns the FPSCR fields in a double. This feature is > available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro > is defined. > GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds > this feature. > > Changes are done to use __builtin_set_fpscr_rn instead of mffscrn > or mffscrni in __fe_mffscrn(rn). > > Suggested-by: Carl Love LGTM, thanks. Reviewed-by: Adhemerval Zanella > --- > sysdeps/powerpc/fpu/fenv_libc.h | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h > index fa5e1c697e..a2a12d914b 100644 > --- a/sysdeps/powerpc/fpu/fenv_libc.h > +++ b/sysdeps/powerpc/fpu/fenv_libc.h > @@ -68,6 +68,14 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; > __fr; \ > }) > > +/* Starting with GCC 14 __builtin_set_fpscr_rn can be used to return the > + FPSCR fields as a double. This support is available > + on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined. > + To retain backward compatibility with older GCC, we still retain the > + old inline assembly implementation.*/ > +#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__ > +#define __fe_mffscrn(rn) __builtin_set_fpscr_rn (rn) > +#else > #define __fe_mffscrn(rn) \ > ({register fenv_union_t __fr; \ > if (__builtin_constant_p (rn)) \ > @@ -83,6 +91,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; > } \ > __fr.fenv; \ > }) > +#endif > > /* Like fegetenv_control, but also sets the rounding mode. */ > #ifdef _ARCH_PWR9