From: Arjan van de Ven <arjan@linux.intel.com>
To: Andreas Schwab <schwab@linux-m68k.org>,
Arjan van de Ven via Libc-alpha <libc-alpha@sourceware.org>
Subject: Re: [PATCH] x86: Optimize atomic_compare_and_exchange_[val|bool]_acq [BZ #28537]
Date: Wed, 3 Nov 2021 12:21:03 -0700 [thread overview]
Message-ID: <f51d7521-7ee9-9978-6219-6f87afa54b38@linux.intel.com> (raw)
In-Reply-To: <87v91917mb.fsf@igel.home>
On 11/3/2021 10:17 AM, Andreas Schwab wrote:
> On Nov 03 2021, Arjan van de Ven via Libc-alpha wrote:
>
>> What the patch does is check non-atomic first if the actual atomic operation has
>> a chance of working. if it has a chance, the actual normal atomic operation is done as
>> before. But if non-atomic read already tells you the cmpxchg has no chance to succeed, it errors
>> out early.
>
> But if the compiler keeps reusing the same cached value it may conclude
> that the CAS _never_ has a chance to succeed.
that's a good point. Now there SHOULD be a (compiler) barrier around this somewhere due
to inserting the pause instruction for such a loop. But putting some explicit compiler barrier in this
makes it for sure safer.
next prev parent reply other threads:[~2021-11-03 19:21 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 15:04 H.J. Lu
2021-11-03 15:14 ` Andreas Schwab
2021-11-03 15:50 ` Oleh Derevenko
2021-11-03 16:59 ` Arjan van de Ven
2021-11-03 17:17 ` Andreas Schwab
2021-11-03 19:21 ` Arjan van de Ven [this message]
2021-11-03 19:48 ` H.J. Lu
2021-11-03 20:38 ` Oleh Derevenko
2021-11-03 22:12 ` H.J. Lu
2021-11-04 8:58 ` Oleh Derevenko
2021-11-04 9:44 ` Oleh Derevenko
2021-11-03 17:26 ` Oleh Derevenko
2021-11-03 17:30 ` Arjan van de Ven
2021-11-03 17:55 ` Oleh Derevenko
2021-11-03 19:22 ` Arjan van de Ven
2021-11-04 11:42 ` Oleh Derevenko
2021-11-04 14:15 ` Arjan van de Ven
2021-11-03 16:35 ` Florian Weimer
2021-11-03 19:13 ` H.J. Lu
2021-11-04 10:15 ` Florian Weimer
2021-11-04 14:31 ` H.J. Lu
2021-11-04 14:59 ` H.J. Lu
2021-11-03 17:25 ` Noah Goldstein
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