From: Richard Henderson <richard.henderson@linaro.org>
To: Shiqi Zhang <shiqi@isrc.iscas.ac.cn>, libc-alpha@sourceware.org
Cc: schwab@linux-m68k.org
Subject: Re: [PATCH v2] riscv: Add macros for FPUCW/fcsr in fpu_control.h
Date: Sun, 12 Feb 2023 09:36:57 -1000 [thread overview]
Message-ID: <ffd43a90-9e8b-15cb-6975-1d4071f7593f@linaro.org> (raw)
In-Reply-To: <20230212065214.2399-1-shiqi@isrc.iscas.ac.cn>
On 2/11/23 20:52, Shiqi Zhang wrote:
> Add macros for rounding modes and accrued exception flags in order to
> make controlling fcsr easier for users.
>
> Reference: RISC-V Unprivileged Spec v20191213, Section 11.2: Figure 11.2, Table 11.1 & 11.2
> ---
> Fixed careless mistakes in v1 and removed invalid rounding mode DYN.
>
> Still, I think these macros should be documented somewhere but I'm
> not sure where should I doc them. I'll appreciate it if you could give
> some suggestions.
Honestly, no one should be using <fpu_control.h> at all. It was originally an x86
specific thing. The only reason to fill in this header at all is to match the original
x86 API. Therefore the symbol names should match ./sysdeps/x86/fpu_control.h.
When porting applications to work on RISC-V, it would be much better to update them to use
<fenv.h>, which is what ISO C standardized. I assume there would be more than a few
ifdefs removed in the process.
r~
next prev parent reply other threads:[~2023-02-12 19:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 6:52 Shiqi Zhang
2023-02-12 19:36 ` Richard Henderson [this message]
2023-02-13 6:16 ` Shiqi Zhang
2023-02-13 8:39 ` Andreas Schwab
2023-02-13 10:17 ` Shiqi Zhang
2023-02-13 22:00 ` Joseph Myers
2023-02-13 18:17 ` Richard Henderson
2023-02-13 19:31 ` Shiqi Zhang
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