From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by sourceware.org (Postfix) with ESMTPS id 4FB1C3858D28 for ; Fri, 31 Mar 2023 21:38:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4FB1C3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pj1-x1029.google.com with SMTP id fy10-20020a17090b020a00b0023b4bcf0727so24817741pjb.0 for ; Fri, 31 Mar 2023 14:38:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; t=1680298683; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=v6GQ5n5wG5hRgBOf7b9RFTn7n/YUTeGXG435nA0mtSI=; b=GPrivyJzyX81D8nlt8nP7r3ERQHopKMOkTanQeUNUk7dZpPEcJXvi4u6NSoyjDm7Lf kD4qe0SglCP5cowFYjmmNZj+CB6OJZPaQZ2u9Hlexg5XkH5/4c4ti/OSFXBfxdBkxkng jRjjL30cVzOJgIyIYK7nXOKVD2Q5Gf8YCtPIOiY35h6VpAuuoyS1PS95S46QAnUkcg1r v03ueg9bKnjOqCLm2ibA28nMTgpmyzv4HoAYzhMDxwRC6PLSlK/4H8oJxA3ENa5mwUAl w68BVAxDwnsL/Llmh80O7ka5v0rz2zld7AOVdQZUK1OVchalOY6uzAJtGL2EBaPcLS0e 98sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680298683; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=v6GQ5n5wG5hRgBOf7b9RFTn7n/YUTeGXG435nA0mtSI=; b=02nvvVhlQWtAR90IkmkdEH1+Bm2Pbggrb+yqwsrY2nQzZSuuRxy4pi6M88J8huN7Nu eF4RZN4wcGbiujtLU8QdS2ZCWhpN3fKdqwT+kKoWCpqNt4ut2kx7G8Y4tTwft41vtUy2 34HKTE79jX0sWej9CoayZFjEcW11tHXIOYE30gjEIFute4UzxDn/FiijkExv3pzVCCqE nGwqC7IHlNEMZTrwEgWgRHqmH/JLyNWqeMqGqNCNKugFEr6w9rbQBiKIb5jidGQQ8mgO iTGDhOnZ1m6SmGKDWjeeRZBZjt6HP1eX/PJzBfXNONJoH8qGA8DYGxqIUwWZOGRVaV7f qN8g== X-Gm-Message-State: AAQBX9fSQxHA0Fgt2dUrY+nXembwrB7CQ+IU26kQk1tZijm0WfYcarXT e+ZTiMWwo6SnVMRjy5yjvgIsYA== X-Google-Smtp-Source: AKy350b1ErVsf75UnYZFilGKlQkdyiRTMucNwMLdM3qtCyEssSBL6SBQ7693SizeI+Cej3UpVo+qaQ== X-Received: by 2002:a17:903:94:b0:1a1:b506:6fe with SMTP id o20-20020a170903009400b001a1b50606femr22910234pld.29.1680298683194; Fri, 31 Mar 2023 14:38:03 -0700 (PDT) Received: from localhost ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id kf11-20020a17090305cb00b0019f11caf11asm2012727plb.166.2023.03.31.14.38.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:38:02 -0700 (PDT) Date: Fri, 31 Mar 2023 14:38:02 -0700 (PDT) X-Google-Original-Date: Fri, 31 Mar 2023 14:38:00 PDT (-0700) Subject: Re: [PATCH v2 0/3] RISC-V: ifunced memcpy using new kernel hwprobe interface In-Reply-To: CC: adhemerval.zanella@linaro.org, Evan Green , libc-alpha@sourceware.org, slewis@rivosinc.com, Vineet Gupta From: Palmer Dabbelt To: jeffreyalaw@gmail.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, 31 Mar 2023 14:35:36 PDT (-0700), jeffreyalaw@gmail.com wrote: > > > On 3/31/23 15:03, Palmer Dabbelt wrote: >> On Fri, 31 Mar 2023 13:19:19 PDT (-0700), jeffreyalaw@gmail.com wrote: >> >> [just snipping the rest so we can focus on Jeff's ask, the other stuff >> is interesting but a longer reply and we'd probably want to fork the >> thread anyway...] >> >>> So perhaps we can narrow down the scope right now even further.  Can we >>> agree to try and settle on a base implementation with no ISA extensions >>> and no uarch variants?  ISTM if we can settle on those implementations >>> that it should be usable immediately by the RV community at large and >>> doesn't depend on the kernel->glibc interface work. >> >> That base includes V and ZBB?  In that case we'd be dropping support for >> all existing hardware, which I would be very much against. > No, it would not include V or ZBB. It would be something that could > work on any risc-v hardware. Sorry if I wasn't clear about that. I'm still kind of confused then, maybe it's just too abstract? Is there something you could propose as being the base?