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Date: Mon, 29 Jan 2018 16:39:00 -0000
X-Google-Original-Date: Mon, 29 Jan 2018 07:32:56 PST (-0800)
Subject:     Re: [PATCH v7 05/17] RISC-V: ABI Implementation
In-Reply-To: <alpine.DEB.2.20.1801291522210.11517@digraph.polyomino.org.uk>
CC: libc-alpha@sourceware.org
From: Palmer Dabbelt <palmer@dabbelt.com>
To: joseph@codesourcery.com
Message-ID: <mhng-f48a7161-1c6e-4b78-ac3b-9c5714a9a885@palmer-si-x1c4>
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On Mon, 29 Jan 2018 07:23:26 PST (-0800), joseph@codesourcery.com wrote:
> On Fri, 26 Jan 2018, Palmer Dabbelt wrote:
>
>> diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h
>
>> +#elif __riscv_xlen == 32
>> +#error "rv32i-based targets are not supported"
>
> Missing preprocessor indentation, "# error".  Please fix this as part of
> the commit.  Do not send a v8 patch series.

Thanks!  Fixed.