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From: DJ Delorie <dj@redhat.com>
To: Zong Li <zongbox@gmail.com>
Cc: joseph@codesourcery.com, palmer@dabbelt.com, darius@bluespec.com,
	andrew@sifive.com, libc-alpha@sourceware.org, zong@andestech.com,
	zongbox@gmail.com
Subject: Re: [PATCH v4 06/10] RISC-V: Regenerate ULPs of RISC-V
Date: Sat, 08 Dec 2018 00:08:00 -0000	[thread overview]
Message-ID: <xn8t10q41p.fsf@greed.delorie.com> (raw)
In-Reply-To: <4048196580b0ecbde3abea83c3a61fe9fb6429ec.1543572707.git.zongbox@gmail.com> (message from Zong Li on Sat,  1 Dec 2018 11:10:49 +0800)


Zong Li <zongbox@gmail.com> writes:
> -ildouble: 1
> -ldouble: 1
> +ildouble: 8
> +ldouble: 8

In addition to what Joseph said, if rv32 and rv64 are giving different
ULPs for the "same" FPU, something is likely wrong.  Before sharing ULP
files between rv32 and rv64, please re-generate on both targets
independently and prove that they're the same.

I certainly would question anything that increases the ULPs for rv64.

  parent reply	other threads:[~2018-12-08  0:02 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-01  3:13 [PATCH v4 00/10] RISC-V glibc port for the 32-bit Zong Li
2018-12-01  3:13 ` [PATCH v4 01/10] Documentation for the RISC-V 32-bit port Zong Li
2018-12-01  3:13 ` [PATCH v4 05/10] RISC-V: Hard float support for the 32 bit Zong Li
2018-12-01  3:13 ` [PATCH v4 08/10] RISC-V: Build Infastructure for the 32-bit Zong Li
2018-12-01  3:13 ` [PATCH v4 02/10] RISC-V: Support dynamic loader " Zong Li
2018-12-01  3:13 ` [PATCH v4 10/10] Add RISC-V 32-bit target to build-many-glibcs.py Zong Li
2018-12-01  3:13 ` [PATCH v4 04/10] RISC-V: The ABI implementation for the 32-bit Zong Li
2018-12-01  3:13 ` [PATCH v4 03/10] RISC-V: Add path of library directories " Zong Li
2018-12-07 23:02   ` DJ Delorie
2018-12-10  2:45     ` Zong Li
2018-12-10 22:09     ` Joseph Myers
2018-12-10 22:16       ` Andrew Waterman
2018-12-10 22:59         ` Joseph Myers
2018-12-11  2:34           ` Zong Li
2018-12-01  3:13 ` [PATCH v4 09/10] RISC-V: Fix llrint and llround missing exceptions on RV32 Zong Li
2018-12-03 18:05   ` Joseph Myers
2018-12-04 10:01     ` Zong Li
2018-12-08  0:12   ` DJ Delorie
2018-12-10  3:11     ` Zong Li
2018-12-01  3:13 ` [PATCH v4 07/10] RISC-V: Add ABI lists Zong Li
2018-12-01  9:42   ` Andreas Schwab
2018-12-03  1:23     ` Zong Li
2018-12-01  3:13 ` [PATCH v4 06/10] RISC-V: Regenerate ULPs of RISC-V Zong Li
2018-12-03 18:12   ` Joseph Myers
2018-12-04 10:07     ` Zong Li
2018-12-08  0:08   ` DJ Delorie [this message]
2018-12-10  2:47     ` Zong Li
2018-12-03 18:04 ` [PATCH v4 00/10] RISC-V glibc port for the 32-bit Joseph Myers
2018-12-07  9:52   ` Zong Li
2018-12-08 21:25     ` Palmer Dabbelt
2018-12-08 21:33       ` DJ Delorie
2018-12-08 21:51       ` Andrew Waterman
2018-12-10  9:44       ` Zong Li
2018-12-10 17:37         ` Palmer Dabbelt
2018-12-10 17:33       ` Alistair Francis
2018-12-11 18:10       ` Joseph Myers
2018-12-11 19:08         ` Palmer Dabbelt
2018-12-12 12:11           ` Zong Li

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