2004-01-14 Steven Munroe * include/libc-symbols.h [HAVE_ASM_GLOBAL_DOT_NAME] (_symbol_version): Use C_SYMBOL_DOT_NAME to create '.'ed symbols. (_default_symbol_version): Use C_SYMBOL_DOT_NAME to create '.'ed symbols. * sysdeps/powerpc/Makefile: Add rtld-global-offsets.sym to gen-as-const-headers. * sysdeps/powerpc/elf/rtld-global-offsets.sym: New file. * sysdeps/powerpc/sysdep.h: Define v# symbols for vector registers. Define PPC_FEATURE_* masks for Aux Vector AT_HWCAP. * sysdeps/unix/sysv/linux/kernel-features.h (__ASSUME_SWAPCONTEXT_SYSCALL): Define for PPC and 2.6.0 kernels. * sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h[!__WORDSIZE == 32]: Declare mcontext_t inline and include altivec state for 64-bit. diff -urN libc23-cvstip-20040114/include/libc-symbols.h libc23/include/libc-symbols.h --- libc23-cvstip-20040114/include/libc-symbols.h 2003-07-22 14:24:48.000000000 -0500 +++ libc23/include/libc-symbols.h 2004-01-14 17:23:00.858100856 -0600 @@ -420,10 +420,10 @@ # ifdef HAVE_ASM_GLOBAL_DOT_NAME # define _symbol_version(real, name, version) \ .symver real, name##@##version ASM_LINE_SEP \ - .symver .##real, .##name##@##version + .symver C_SYMBOL_DOT_NAME(real), C_SYMBOL_DOT_NAME(name##@##version) # define _default_symbol_version(real, name, version) \ .symver real, name##@##@##version ASM_LINE_SEP \ - .symver .##real, .##name##@##@##version + .symver C_SYMBOL_DOT_NAME(real), C_SYMBOL_DOT_NAME(name##@##@##version) # else # define _symbol_version(real, name, version) \ .symver real, name##@##version diff -urN libc23-cvstip-20040114/sysdeps/powerpc/Makefile libc23/sysdeps/powerpc/Makefile --- libc23-cvstip-20040114/sysdeps/powerpc/Makefile 2002-09-05 04:50:08.000000000 -0500 +++ libc23/sysdeps/powerpc/Makefile 2004-01-14 17:23:00.859100704 -0600 @@ -17,3 +17,8 @@ # extra shared linker files to link only into dl-allobjs.so sysdep-rtld-routines += dl-machine endif + +ifeq ($(subdir),csu) +# get offset to rtld_global._dl_hwcap +gen-as-const-headers += rtld-global-offsets.sym +endif diff -urN libc23-cvstip-20040114/sysdeps/powerpc/elf/rtld-global-offsets.sym libc23/sysdeps/powerpc/elf/rtld-global-offsets.sym --- libc23-cvstip-20040114/sysdeps/powerpc/elf/rtld-global-offsets.sym Wed Dec 31 18:00:00 1969 +++ libc23/sysdeps/powerpc/elf/rtld-global-offsets.sym Wed Jan 14 17:23:00 2004 @@ -0,0 +1,7 @@ +#define SHARED 1 + +#include + +#define rtdl_global_offsetof(mem) offsetof (struct rtld_global, mem) + +RTLD_GLOBAL_DL_HWCAP_OFFSET rtdl_global_offsetof (_dl_hwcap) diff -urN libc23-cvstip-20040114/sysdeps/powerpc/sysdep.h libc23/sysdeps/powerpc/sysdep.h --- libc23-cvstip-20040114/sysdeps/powerpc/sysdep.h 2002-09-20 18:44:55.000000000 -0500 +++ libc23/sysdeps/powerpc/sysdep.h 2004-01-14 19:57:30.700104312 -0600 @@ -100,6 +100,42 @@ #define cr6 6 #define cr7 7 +/* Vector registers. */ +#define v0 0 +#define v1 1 +#define v2 2 +#define v3 3 +#define v4 4 +#define v5 5 +#define v6 6 +#define v7 7 +#define v8 8 +#define v9 9 +#define v10 10 +#define v11 11 +#define v12 12 +#define v13 13 +#define v14 14 +#define v15 15 +#define v16 16 +#define v17 17 +#define v18 18 +#define v19 19 +#define v20 20 +#define v21 21 +#define v22 22 +#define v23 23 +#define v24 24 +#define v25 25 +#define v26 26 +#define v27 27 +#define v28 28 +#define v29 29 +#define v30 30 +#define v31 31 + +#define VRSAVE 256 + #ifdef __ELF__ @@ -111,5 +147,18 @@ #endif /* __ELF__ */ +/* + * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). + * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup. + * The following must match the kernels linux/asm/cputable.h. + */ +#define PPC_FEATURE_32 0x80000000 /* 32-bit mode. */ +#define PPC_FEATURE_64 0x40000000 /* 64-bit mode. */ +#define PPC_FEATURE_601_INSTR 0x20000000 /* 601 chip, Old POWER ISA. */ +#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 /* SIMD/Vector Unit. */ +#define PPC_FEATURE_HAS_FPU 0x08000000 /* Floating Point Unit. */ +#define PPC_FEATURE_HAS_MMU 0x04000000 /* Memory Management Unit. */ +#define PPC_FEATURE_HAS_4xxMAC 0x02000000 /* 4xx Multiply Accumulator. */ +#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 /* Unified I/D cache. */ #endif /* __ASSEMBLER__ */ diff -urN libc23-cvstip-20040114/sysdeps/unix/sysv/linux/kernel-features.h libc23/sysdeps/unix/sysv/linux/kernel-features.h --- libc23-cvstip-20040114/sysdeps/unix/sysv/linux/kernel-features.h 2003-12-11 22:31:39.000000000 -0600 +++ libc23/sysdeps/unix/sysv/linux/kernel-features.h 2004-01-14 18:28:42.616139248 -0600 @@ -379,3 +379,10 @@ #if __LINUX_KERNEL_VERSION >= 132609 # define __ASSUME_PROT_GROWSUPDOWN 1 #endif + +/* Starting with 2.6.0 PowerPC adds signal/swapcontext support for Vector + SIMD (AKA Altivec, VMX) instructions and register state. This changes + the overall size of the sigcontext and adds the swapcontext syscall. */ +#if __LINUX_KERNEL_VERSION >= (132608) && defined __powerpc__ +# define __ASSUME_SWAPCONTEXT_SYSCALL 1 +#endif diff -urN libc23-cvstip-20040114/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h libc23/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h --- libc23-cvstip-20040114/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h 2003-12-17 17:11:15.000000000 -0600 +++ libc23/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h 2004-01-14 19:55:47.065149912 -0600 @@ -1,4 +1,4 @@ -/* Copyright (C) 1998, 1999, 2002 Free Software Foundation, Inc. +/* Copyright (C) 1998, 1999, 2002, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #if __WORDSIZE == 32 /* Number of general registers. */ -#define NGREG 48 +# define NGREG 48 /* Container for all general registers. */ typedef unsigned long gregset_t[NGREG]; @@ -62,8 +62,74 @@ #else -/* For 64-bit, a machine context is exactly a sigcontext. */ -typedef struct sigcontext mcontext_t; +/* For 64-bit kernels with Altivec support, a machine context is exactly + * a sigcontext. For older kernel (without Altivec) the sigcontext matches + * the mcontext upto but not including the v_regs field. For kernels that + * don't AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the + * v_regs field may not exit and should not be referenced. The v_regd field + * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC + * is set in AT_HWCAP. */ + +# include + +/* Number of general registers. */ +# define NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */ +# define NFPREG 33 /* includes fp0-fp31 &fpscr. */ +# define NVRREG 34 /* includes v0-v31, vscr, & vrsave in split vectors */ + +typedef unsigned long gregset_t[NGREG]; +typedef double fpregset_t[NFPREG]; + +/* Container for Altivec/VMX Vector Status and Control Register. Only 32-bits + but can only be copied to/from a 128-bit vector register. So we allocated + a whole quadword speedup save/restore. */ +typedef struct _libc_vscr +{ + unsigned int __pad[3]; + unsigned int vscr_word; +} vscr_t; + +/* Container for Altivec/VMX registers and status. + Must to be aligned on a 16-byte boundary. */ +typedef struct _libc_vrstate +{ + unsigned int vrregs[32][4]; + vscr_t vscr; + unsigned int vrsave; + unsigned int __pad[3]; +} vrregset_t __attribute__((__aligned__(16))); + +typedef struct { + unsigned long __unused[4]; + int signal; + int __pad0; + unsigned long handler; + unsigned long oldmask; + struct pt_regs *regs; + gregset_t gp_regs; + fpregset_t fp_regs; +/* + * To maintain compatibility with current implementations the sigcontext is + * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) + * followed by an unstructured (vmx_reserve) field of 69 doublewords. This + * allows the array of vector registers to be quadword aligned independent of + * the alignment of the containing sigcontext or ucontext. It is the + * responsibility of the code setting the sigcontext to set this pointer to + * either NULL (if this processor does not support the VMX feature) or the + * address of the first quadword within the allocated (vmx_reserve) area. + * + * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually + * an array of 34 quadword entries. The entries with + * indexes 0-31 contain the corresponding vector registers. The entry with + * index 32 contains the vscr as the last word (offset 12) within the + * quadword. This allows the vscr to be stored as either a quadword (since + * it must be copied via a vector register to/from storage) or as a word. + * The entry with index 33 contains the vrsave as the first word (offset 0) + * within the quadword. + */ + vrregset_t *v_regs; + long vmx_reserve[NVRREG+NVRREG+1]; +} mcontext_t; #endif