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Date: Tue, 27 Mar 2007 18:07:00 -0000
From: Steven Munroe <munroesj@us.ibm.com>
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To: Jakub Jelinek <jakub@redhat.com>
CC: Glibc hackers <libc-hacker@sources.redhat.com>,
        Ulrich Drepper <drepper@redhat.com>,
        Peter Eberlein <eberlein@us.ibm.com>
Subject: Re: [PATCH] PPC fenv fixes.
References: <20070322145345.GZ1826@sunsite.mff.cuni.cz> <4602FCE5.7060203@us.ibm.com> <460941B8.2050501@us.ibm.com> <20070327160708.GA355@devserv.devel.redhat.com>
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Jakub Jelinek wrote:
> On Tue, Mar 27, 2007 at 11:09:28AM -0500, Steven Munroe wrote:
>   
>> 2007-03-26  Steven Munroe  <sjmunroe@us.ibm.com>
>>
>> 	* sysdeps/powerpc/fpu/feupdateenv.c: Change mask to merge exceptions
>> 	from env.
>>     
>
> Will that actually raise SIGFPE signals when exceptions are enabled?
> From my reading of POSIX that's what should happen with the
> `old' exceptions (and other arches are calling feraiseexcept that will do
> that).  I didn't add a testcase for it because I'm not 100% sure about that.
>
>   
hmmm not unless the SIGFPE is eanbled by the MSR FE bits. So we will
need to call __fe_nomask_env() in feupdateenv similar to what we do in
feenableexcept(). Probably should add the __fe_mask_env() call for when
the application remasks FP exceptions. This allows the hardware to run
faster when we are taking the default action.

I will rework the patch.