From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16577 invoked by alias); 28 Mar 2007 15:29:11 -0000 Received: (qmail 16560 invoked by uid 22791); 28 Mar 2007 15:29:11 -0000 X-Spam-Check-By: sourceware.org Received: from e1.ny.us.ibm.com (HELO e1.ny.us.ibm.com) (32.97.182.141) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 28 Mar 2007 16:29:03 +0100 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e1.ny.us.ibm.com (8.13.8/8.13.8) with ESMTP id l2SFSxvh002571 for ; Wed, 28 Mar 2007 11:28:59 -0400 Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v8.3) with ESMTP id l2SFSx7F219616 for ; Wed, 28 Mar 2007 11:28:59 -0400 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id l2SFSxG2013454 for ; Wed, 28 Mar 2007 11:28:59 -0400 Received: from [9.10.86.122] (spokane1.rchland.ibm.com [9.10.86.122]) by d01av02.pok.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id l2SFSwB0013426; Wed, 28 Mar 2007 11:28:58 -0400 Message-ID: <460A8D78.6060303@us.ibm.com> Date: Wed, 28 Mar 2007 15:29:00 -0000 From: Steven Munroe User-Agent: Mozilla/5.0 (X11; U; Linux ppc64; en-US; rv:1.8.0.9) Gecko/20060906 SUSE/1.8_seamonkey_1.0.7-1.1 SeaMonkey/1.0.7 MIME-Version: 1.0 To: Jakub Jelinek CC: Glibc hackers , Ulrich Drepper , Peter Eberlein Subject: Re: [PATCH] PPC fenv fixes. References: <20070322145345.GZ1826@sunsite.mff.cuni.cz> <4602FCE5.7060203@us.ibm.com> <460941B8.2050501@us.ibm.com> <20070327160708.GA355@devserv.devel.redhat.com> <46096124.6050504@us.ibm.com> In-Reply-To: <46096124.6050504@us.ibm.com> Content-Type: multipart/mixed; boundary="------------040607010209090502080803" Mailing-List: contact libc-hacker-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-hacker-owner@sourceware.org X-SW-Source: 2007-03/txt/msg00041.txt.bz2 This is a multi-part message in MIME format. --------------040607010209090502080803 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-length: 1575 Steven Munroe wrote: > Jakub Jelinek wrote: > >> On Tue, Mar 27, 2007 at 11:09:28AM -0500, Steven Munroe wrote: >> >>> 2007-03-26 Steven Munroe >>> >>> * sysdeps/powerpc/fpu/feupdateenv.c: Change mask to merge exceptions >>> from env. >>> >> Will that actually raise SIGFPE signals when exceptions are enabled? >> From my reading of POSIX that's what should happen with the >> `old' exceptions (and other arches are calling feraiseexcept that will do >> that). I didn't add a testcase for it because I'm not 100% sure about that. >> >> > hmmm not unless the SIGFPE is eanbled by the MSR FE bits. So we will > need to call __fe_nomask_env() in feupdateenv similar to what we do in > feenableexcept(). Probably should add the __fe_mask_env() call for when > the application remasks FP exceptions. This allows the hardware to run > faster when we are taking the default action. > > I will rework the patch. > Merges my patch with one from Peter Bergner to use the prctl system to eanble/disable FP exception when ever the FPSCR exeptions bits: FPSCR_VE, /* invalid operation exception enable */ FPSCR_OE, /* overflow exception enable */ FPSCR_UE, /* underflow exception enable */ FPSCR_ZE, /* zero divide exception enable */ FPSCR_XE, /* inexact exception enable */ Change from all disabled to any enabled or any eanbled to all disabled. This check was already in feenableexcept(). This patch adds the appropriate eanble/disable calls to fedisableexcept() and __feupdateenv(). --------------040607010209090502080803 Content-Type: text/plain; name="ppc-fenv-20070320.txt" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="ppc-fenv-20070320.txt" Content-length: 10722 2007-03-26 Steven Munroe Peter Bergner * sysdeps/powerpc/Versions (GLIBC_2.4): Add __fe_mask_env. * sysdeps/powerpc/bits/fenv.h: Declare __fe_nomask_env extern. Define FE_MASK_ENV. * sysdeps/powerpc/fpu/fe_mask.c: New file. * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Call __fe_mask_env if all FP exceptions disabled. * sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Change mask to merge exceptions from env. Use FE_NOMASK_ENV or FE_MASK_ENV when transitioning from all exceptions disabled to any exception enabled or visa versa. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c: New file. diff -urN libc25-cvstip-20070320/sysdeps/powerpc/Versions libc25/sysdeps/powerpc/Versions --- libc25-cvstip-20070320/sysdeps/powerpc/Versions 2004-02-13 21:25:10.000000000 -0600 +++ libc25/sysdeps/powerpc/Versions 2007-03-27 17:00:20.662310456 -0500 @@ -3,6 +3,10 @@ # symbols used in macros from sysdeps/powerpc/bits/fenv.h __fe_dfl_env; __fe_enabled_env; __fe_nonieee_env; __fe_nomask_env; } + GLIBC_2.4 { + # symbols used in macros from sysdeps/powerpc/bits/fenv.h + __fe_mask_env; + } } libc { diff -urN libc25-cvstip-20070320/sysdeps/powerpc/bits/fenv.h libc25/sysdeps/powerpc/bits/fenv.h --- libc25-cvstip-20070320/sysdeps/powerpc/bits/fenv.h 2002-10-17 17:38:37.000000000 -0500 +++ libc25/sysdeps/powerpc/bits/fenv.h 2007-03-27 13:59:43.475316488 -0500 @@ -142,4 +142,8 @@ performance penalty (but have no other visible effect). */ extern const fenv_t *__fe_nomask_env (void); # define FE_NOMASK_ENV (__fe_nomask_env ()) + +/* Floating-point environment with all exceptions disabled. */ +extern const fenv_t *__fe_mask_env (void); +# define FE_MASK_ENV (__fe_mask_env ()) #endif diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/Makefile libc25/sysdeps/powerpc/fpu/Makefile --- libc25-cvstip-20070320/sysdeps/powerpc/fpu/Makefile 2004-05-25 23:33:09.000000000 -0500 +++ libc25/sysdeps/powerpc/fpu/Makefile 2007-03-27 14:49:12.307388232 -0500 @@ -1,5 +1,5 @@ ifeq ($(subdir),math) -libm-support += fenv_const fe_nomask t_sqrt +libm-support += fenv_const fe_nomask fe_mask t_sqrt # libm needs ld.so to access dl_hwcap $(objpfx)libm.so: $(elfobjdir)/ld.so diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/fe_mask.c libc25/sysdeps/powerpc/fpu/fe_mask.c --- libc25-cvstip-20070320/sysdeps/powerpc/fpu/fe_mask.c Wed Dec 31 18:00:00 1969 +++ libc25/sysdeps/powerpc/fpu/fe_mask.c Tue Mar 27 13:59:43 2007 @@ -0,0 +1,32 @@ +/* Procedure definition for FE_MASK_ENV. + Copyright (C) 2007 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include +#include + +/* This is presently a stub, until it's decided how the kernels should + support this. */ + +const fenv_t * +__fe_mask_env(void) +{ + __set_errno (ENOSYS); + return FE_DFL_ENV; +} +stub_warning (__fe_mask_env) diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/fedisblxcpt.c libc25/sysdeps/powerpc/fpu/fedisblxcpt.c --- libc25-cvstip-20070320/sysdeps/powerpc/fpu/fedisblxcpt.c 2001-07-05 23:56:02.000000000 -0500 +++ libc25/sysdeps/powerpc/fpu/fedisblxcpt.c 2007-03-27 13:59:43.494313600 -0500 @@ -24,7 +24,7 @@ fedisableexcept (int excepts) { fenv_union_t fe; - int result; + int result, new; result = fegetexcept (); @@ -44,7 +44,11 @@ fe.l[1] &= ~(1 << (31 - FPSCR_VE)); fesetenv_register (fe.fenv); - if ((fegetexcept () & excepts) != 0) + new = fegetexcept (); + if (new == 0 && result != 0) + (void)__fe_mask_env (); + + if ((new & excepts) != 0) result = -1; return result; } diff -urN libc25-cvstip-20070320/sysdeps/powerpc/fpu/feupdateenv.c libc25/sysdeps/powerpc/fpu/feupdateenv.c --- libc25-cvstip-20070320/sysdeps/powerpc/fpu/feupdateenv.c 2001-07-05 23:56:02.000000000 -0500 +++ libc25/sysdeps/powerpc/fpu/feupdateenv.c 2007-03-27 16:50:49.810423368 -0500 @@ -1,5 +1,5 @@ /* Install given floating-point environment and raise exceptions. - Copyright (C) 1997,99,2000,01 Free Software Foundation, Inc. + Copyright (C) 1997,99,2000,01,07 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper , 1997. @@ -30,8 +30,24 @@ new.fenv = *envp; old.fenv = fegetenv_register (); - /* Copy the set exceptions from `old' to `new'. */ - new.l[1] = (new.l[1] & 0xE00000FF) | (old.l[1] & 0x1FFFFF00); + /* Restore rounding mode and exception enable from *envp and merge + exceptions. Leave fraction rounded/inexact and FP result/CC bits + unchanged. */ + new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF); + + /* If the old env has no eabled exceptions and the new env has any enabled + exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put + the hardware into "precise mode" and may cause the FPU to run slower on + some hardware. */ + if ((old.l[1] & 0x000000F8) == 0 && (new.l[1] & 0x000000F8) != 0) + FE_NOMASK_ENV; + + /* If the old env had any eabled exceptions and the new env has no enabled + exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the + FPU to run faster because it always takes the default action and can not + generate SIGFPE. */ + if ((old.l[1] & 0x000000F8) != 0 && (new.l[1] & 0x000000F8) == 0) + FE_MASK_ENV; /* Atomically enable and raise (if appropriate) exceptions set in `new'. */ fesetenv_register (new.fenv); diff -urN libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c libc25/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c --- libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c Wed Dec 31 18:00:00 1969 +++ libc25/sysdeps/unix/sysv/linux/powerpc/powerpc32/fe_mask.c Tue Mar 27 13:59:43 2007 @@ -0,0 +1,68 @@ +/* Procedure definition for FE_MASK_ENV for Linux/ppc. + Copyright (C) 2007 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include +#include +#include +#include +#include +#include +#include + +#if __ASSUME_NEW_PRCTL_SYSCALL == 0 +/* This is rather fiddly under Linux. We don't have direct access, + and there is no system call, but we can change the bits + in a signal handler's context... */ + +static struct sigaction oact; + +static void +fe_mask_handler (int signum, struct sigcontext *sc) +{ + sc->regs->msr &= ~0x900ul; /* FE0 | FE1 */ + sigaction (SIGUSR1, &oact, NULL); +} +#endif + +const fenv_t * +__fe_mask_env (void) +{ +#if __ASSUME_NEW_PRCTL_SYSCALL == 0 +# if defined PR_SET_FPEXC && defined PR_FP_EXC_DISABLED + int result = INLINE_SYSCALL (prctl, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED); + + if (result == -1 && errno == EINVAL) +# endif + { + struct sigaction act; + + act.sa_handler = (sighandler_t) fe_mask_handler; + sigemptyset (&act.sa_mask); + act.sa_flags = 0; + + sigaction (SIGUSR1, &act, &oact); + raise (SIGUSR1); + } +#else + INTERNAL_SYSCALL_DECL (err); + INTERNAL_SYSCALL (prctl, err, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED); +#endif + + return FE_DFL_ENV; +} diff -urN libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c libc25/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c --- libc25-cvstip-20070320/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c Wed Dec 31 18:00:00 1969 +++ libc25/sysdeps/unix/sysv/linux/powerpc/powerpc64/fe_mask.c Tue Mar 27 13:59:43 2007 @@ -0,0 +1,43 @@ +/* Procedure definition for FE_MASK_ENV for Linux/ppc64. + Copyright (C) 2007 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include +#include +#include +#include +#include +#include + +const fenv_t * +__fe_mask_env (void) +{ +#if defined PR_SET_FPEXC && defined PR_FP_EXC_DISABLED + int result; + INTERNAL_SYSCALL_DECL (err); + result = INTERNAL_SYSCALL (prctl, err, 2, PR_SET_FPEXC, PR_FP_EXC_DISABLED); +# ifndef __ASSUME_NEW_PRCTL_SYSCALL + if (INTERNAL_SYSCALL_ERROR_P (result, err) + && INTERNAL_SYSCALL_ERRNO (result, err) == EINVAL) + __set_errno (ENOSYS); +# endif +#else + __set_errno (ENOSYS); +#endif + return FE_DFL_ENV; +} --------------040607010209090502080803--