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From: Richard Henderson <rth@twiddle.net>
To: libc-ports@sourceware.org
Cc: joseph@codesourcery.com
Subject: [PATCH v2 14/14] arm: Add optimized add_n and sub_n
Date: Fri, 01 Mar 2013 17:36:00 -0000	[thread overview]
Message-ID: <1362159320-5934-15-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1362159320-5934-1-git-send-email-rth@twiddle.net>

Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.

This is 250% faster than the generic code as measured on Cortex-A15,
and the same speed as GMP on the same core, and probably everywhere.
---
	* sysdeps/arm/add_n.S: New file.
	* sysdeps/arm/sub_n.S: New file.
---
 ports/sysdeps/arm/add_n.S | 83 +++++++++++++++++++++++++++++++++++++++++++++++
 ports/sysdeps/arm/sub_n.S |  2 ++
 2 files changed, 85 insertions(+)
 create mode 100644 ports/sysdeps/arm/add_n.S
 create mode 100644 ports/sysdeps/arm/sub_n.S

diff --git a/ports/sysdeps/arm/add_n.S b/ports/sysdeps/arm/add_n.S
new file mode 100644
index 0000000..af69733
--- /dev/null
+++ b/ports/sysdeps/arm/add_n.S
@@ -0,0 +1,83 @@
+/* Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+#ifdef USE_AS_SUB_N
+# define INITC	cmp r0, r0
+# define OPC	sbcs
+# define RETC	sbc r0, r0, r0; neg r0, r0
+# define FUNC	__mpn_sub_n
+#else
+# define INITC	cmn r0, #0
+# define OPC	adcs
+# define RETC	mov r0, #0; adc r0, r0, r0
+# define FUNC	__mpn_add_n
+#endif
+
+/* mp_limb_t mpn_add_n(res_ptr, src1_ptr, src2_ptr, size) */
+
+ENTRY (FUNC)
+	push	{ r4, r5, r6, r7, r8, r10, lr }
+	cfi_adjust_cfa_offset (28)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+	cfi_rel_offset (r8, 16)
+	cfi_rel_offset (r10, 20)
+	cfi_rel_offset (lr, 24)
+
+	INITC				/* initialize carry flag */
+	tst	r3, #1			/* count & 1 == 1? */
+	add	lr, r1, r3, lsl #2	/* compute end src1 */
+	beq	1f
+
+	ldr	r4, [r1], #4		/* do one to make count even */
+	ldr	r5, [r2], #4
+	OPC	r4, r4, r5
+	teq	r1, lr			/* end of count? (preserve carry) */
+	str	r4, [r0], #4
+	beq	9f
+1:
+	tst	r3, #2			/* count & 2 == 2?  */
+	beq	2f
+	ldm	r1!, { r4, r5 }		/* do two to make count 0 mod 4 */
+	ldm	r2!, { r6, r7 }
+	OPC	r4, r4, r6
+	OPC	r5, r5, r7
+	teq	r1, lr			/* end of count? */
+	stm	r0!, { r4, r5 }
+	beq	9f
+2:
+	ldm	r1!, { r3, r5, r7, r10 }	/* do four each loop */
+	ldm	r2!, { r4, r6, r8, ip }
+	OPC	r3, r3, r4
+	OPC	r5, r5, r6
+	OPC	r7, r7, r8
+	OPC	r10, r10, ip
+	teq	r1, lr
+	stm	r0!, { r3, r5, r7, r10 }
+	bne	2b
+
+9:
+	RETC				/* copy carry out */
+	pop	{ r4, r5, r6, r7, r8, r10, pc }
+END (FUNC)
diff --git a/ports/sysdeps/arm/sub_n.S b/ports/sysdeps/arm/sub_n.S
new file mode 100644
index 0000000..8eafa41
--- /dev/null
+++ b/ports/sysdeps/arm/sub_n.S
@@ -0,0 +1,2 @@
+#define USE_AS_SUB_N
+#include "add_n.S"
-- 
1.8.1.2

  reply	other threads:[~2013-03-01 17:36 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-01 17:36 [PATCH v2 00/14] ARM improvements Richard Henderson
2013-03-01 17:36 ` Richard Henderson [this message]
2013-03-01 17:59   ` [PATCH v2 14/14] arm: Add optimized add_n and sub_n Roland McGrath
2013-03-06  0:53   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 05/14] arm: Use push/pop mnemonics Richard Henderson
2013-03-01 17:36 ` [PATCH v2 09/14] arm: Tidy architecture selection Richard Henderson
2013-03-01 17:55   ` Roland McGrath
2013-03-05  2:01   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 13/14] arm: Add optimized submul_1 Richard Henderson
2013-03-01 17:58   ` Roland McGrath
2013-03-06  1:14   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 11/14] arm: Add optimized ffs for armv6t2 Richard Henderson
2013-03-05  2:08   ` Joseph S. Myers
2013-03-06 15:52     ` Richard Henderson
2013-03-01 17:36 ` [PATCH v2 06/14] arm: Delete LOADREGS macro Richard Henderson
2013-03-01 17:36 ` [PATCH v2 10/14] arm: Implement hard-tp for GET_TLS Richard Henderson
2013-03-01 17:55   ` Roland McGrath
2013-03-05  2:01   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 08/14] arm: Unless arm4t, pop return address directly into pc Richard Henderson
2013-03-01 17:36 ` [PATCH v2 03/14] arm: Introduce and use GET_TLS Richard Henderson
2013-03-01 17:57   ` Roland McGrath
2013-03-05  1:45   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 01/14] arm: Introduce and use LDST_PCREL Richard Henderson
2013-03-04 17:47   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 04/14] arm: Enable thumb2 mode in assembly files Richard Henderson
2013-03-01 17:36 ` [PATCH v2 02/14] arm: Introduce and use NEGOFF series of macros Richard Henderson
2013-03-01 17:57   ` Roland McGrath
2013-03-05  1:42   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 12/14] arm: Add optimized addmul_1 Richard Henderson
2013-03-01 17:58   ` Roland McGrath
2013-03-01 18:00   ` Roland McGrath
2013-03-06  1:18     ` Joseph S. Myers
2013-10-25 22:13       ` Roland McGrath
2013-03-06  1:11   ` Joseph S. Myers
2013-03-01 17:36 ` [PATCH v2 07/14] arm: Commonize BX conditionals Richard Henderson

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