From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8270 invoked by alias); 8 Aug 2012 20:44:58 -0000 Received: (qmail 8242 invoked by uid 22791); 8 Aug 2012 20:44:56 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from toast.topped-with-meat.com (HELO topped-with-meat.com) (204.197.218.159) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 08 Aug 2012 20:44:43 +0000 Received: by topped-with-meat.com (Postfix, from userid 5281) id 9B9F82C085; Wed, 8 Aug 2012 13:44:42 -0700 (PDT) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit From: Roland McGrath To: libc-ports@sourceware.org Subject: [PATCH roland/arm-atomic-warn] Fiddle ARM atomic.h to avoid -Wvolatile-register-var warnings. Message-Id: <20120808204442.9B9F82C085@topped-with-meat.com> Date: Wed, 08 Aug 2012 20:44:00 -0000 X-CMAE-Score: 0 X-CMAE-Analysis: v=2.0 cv=LtfpOghc c=1 sm=1 a=OOz_s5CrakwA:10 a=Z6MIti7PxpgA:10 a=kj9zAlcOel0A:10 a=hOe2yjtxAAAA:8 a=14OXPxybAAAA:8 a=BdLDxHP_4KYaO6WTzDcA:9 a=CjuIK1q_8ugA:10 a=WkljmVdYkabdwxfqvArNOQ==:117 X-IsSubscribed: yes Mailing-List: contact libc-ports-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: libc-ports-owner@sourceware.org X-SW-Source: 2012-08/txt/msg00056.txt.bz2 Trunk GCC has -Wvolatile-register-var on by default and this hits in some atomic.h macros because __typeof (*ptr) is leaking volatile-ness into the non-pointer declarations and being treated as 'register volatile'. I only did a basic compile test (with trunk gcc for arm-linux-gnueabi). I looked at one file where I'd been getting the warning (nptl-init.c) and the generated code differed only in reordering a couple of (non-atomic) loads whose order shouldn't matter. Ok? Thanks, Roland ports/ChangeLog.arm * sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h [!__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4] (__arch_compare_and_exchange_val_32_acq): Use uint32_t rather than __typeof (...) for non-pointer variables derived from the arguments. diff --git a/ports/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h b/ports/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h index 4e810a2..c9ad50d 100644 --- a/ports/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h +++ b/ports/sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. +/* Copyright (C) 2002-2012 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -74,17 +74,24 @@ void __arm_link_error (void); /* It doesn't matter what register is used for a_oldval2, but we must specify one to work around GCC PR rtl-optimization/21223. Otherwise - it may cause a_oldval or a_tmp to be moved to a different register. */ + it may cause a_oldval or a_tmp to be moved to a different register. + We use the union trick rather than simply using __typeof (...) in the + declarations of A_OLDVAL et al because when NEWVAL or OLDVAL is of the + form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has + a 'volatile ...' type and this triggers -Wvolatile-register-var to + complain about 'register volatile ... asm ("reg")'. */ #elif defined __thumb2__ /* Thumb-2 has ldrex/strex. However it does not have barrier instructions, so we still need to use the kernel helper. */ #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - ({ register __typeof (oldval) a_oldval asm ("r0"); \ - register __typeof (oldval) a_newval asm ("r1") = (newval); \ + ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ + union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\ + register uint32_t a_oldval asm ("r0"); \ + register uint32_t a_newval asm ("r1") = newval_arg.v; \ register __typeof (mem) a_ptr asm ("r2") = (mem); \ - register __typeof (oldval) a_tmp asm ("r3"); \ - register __typeof (oldval) a_oldval2 asm ("r4") = (oldval); \ + register uint32_t a_tmp asm ("r3"); \ + register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \ __asm__ __volatile__ \ ("0:\tldr\t%[tmp],[%[ptr]]\n\t" \ "cmp\t%[tmp], %[old2]\n\t" \ @@ -100,14 +107,16 @@ void __arm_link_error (void); : [new] "r" (a_newval), [ptr] "r" (a_ptr), \ [old2] "r" (a_oldval2) \ : "ip", "lr", "cc", "memory"); \ - a_tmp; }) + (__typeof (oldval)) a_tmp; }) #else -#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - ({ register __typeof (oldval) a_oldval asm ("r0"); \ - register __typeof (oldval) a_newval asm ("r1") = (newval); \ +#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ + union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\ + register uint32_t a_oldval asm ("r0"); \ + register uint32_t a_newval asm ("r1") = newval_arg.v; \ register __typeof (mem) a_ptr asm ("r2") = (mem); \ - register __typeof (oldval) a_tmp asm ("r3"); \ - register __typeof (oldval) a_oldval2 asm ("r4") = (oldval); \ + register uint32_t a_tmp asm ("r3"); \ + register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \ __asm__ __volatile__ \ ("0:\tldr\t%[tmp],[%[ptr]]\n\t" \ "cmp\t%[tmp], %[old2]\n\t" \ @@ -123,7 +132,7 @@ void __arm_link_error (void); : [new] "r" (a_newval), [ptr] "r" (a_ptr), \ [old2] "r" (a_oldval2) \ : "ip", "lr", "cc", "memory"); \ - a_tmp; }) + (__typeof (oldval)) a_tmp; }) #endif #define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \