* [PATCH][alpha] Fix _SC_LEVEL*CACHE*
@ 2011-04-01 21:19 Aurelien Jarno
2012-02-19 12:51 ` Aurelien Jarno
0 siblings, 1 reply; 3+ messages in thread
From: Aurelien Jarno @ 2011-04-01 21:19 UTC (permalink / raw)
To: libc-ports
sysconf() on alpha returns improper results for _SC_LEVEL*CACHE*
entries:
| LEVEL1_ICACHE_SIZE 64
| LEVEL1_ICACHE_ASSOC 65536
| LEVEL1_ICACHE_LINESIZE 2
| LEVEL1_DCACHE_SIZE 64
| LEVEL1_DCACHE_ASSOC 65536
|Â LEVEL1_DCACHE_LINESIZE 2
| LEVEL2_CACHE_SIZE 64
| LEVEL2_CACHE_ASSOC 4194304
| LEVEL2_CACHE_LINESIZE 1
This is due to the entries number being not properly aligned on modulo
3. This probably used to work at some point, but now that more entries
have been added, it doesn't work anymore. The patch below fixes that.
2011-04-01 Aurelien Jarno <aurelien@aurel32.net>
* sysdeps/unix/sysv/linux/alpha/sysconf.c: Fix cache sysconf
switch.
diff --git a/sysdeps/unix/sysv/linux/alpha/sysconf.c b/sysdeps/unix/sysv/linux/alpha/sysconf.c
index 51a2a47..30faa3f 100644
--- a/sysdeps/unix/sysv/linux/alpha/sysconf.c
+++ b/sysdeps/unix/sysv/linux/alpha/sysconf.c
@@ -135,7 +135,7 @@ __sysconf (int name)
if (shape <= 0)
return shape;
- switch (name % 3)
+ switch ((name - _SC_LEVEL1_ICACHE_SIZE) % 3)
{
case 0: /* total size */
return shape & -0x100;
--
Aurelien Jarno GPG: 1024D/F1BCDB73aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH][alpha] Fix _SC_LEVEL*CACHE*
2011-04-01 21:19 [PATCH][alpha] Fix _SC_LEVEL*CACHE* Aurelien Jarno
@ 2012-02-19 12:51 ` Aurelien Jarno
2012-02-20 16:40 ` Richard Henderson
0 siblings, 1 reply; 3+ messages in thread
From: Aurelien Jarno @ 2012-02-19 12:51 UTC (permalink / raw)
To: libc-ports; +Cc: Richard Henderson
Ping ?
On Fri, Apr 01, 2011 at 11:18:54PM +0200, Aurelien Jarno wrote:
> sysconf() on alpha returns improper results for _SC_LEVEL*CACHE*
> entries:
>
> | LEVEL1_ICACHE_SIZE 64
> | LEVEL1_ICACHE_ASSOC 65536
> | LEVEL1_ICACHE_LINESIZE 2
> | LEVEL1_DCACHE_SIZE 64
> | LEVEL1_DCACHE_ASSOC 65536
> |Â LEVEL1_DCACHE_LINESIZE 2
> | LEVEL2_CACHE_SIZE 64
> | LEVEL2_CACHE_ASSOC 4194304
> | LEVEL2_CACHE_LINESIZE 1
>
> This is due to the entries number being not properly aligned on modulo
> 3. This probably used to work at some point, but now that more entries
> have been added, it doesn't work anymore. The patch below fixes that.
>
>
> 2011-04-01 Aurelien Jarno <aurelien@aurel32.net>
>
> * sysdeps/unix/sysv/linux/alpha/sysconf.c: Fix cache sysconf
> switch.
>
> diff --git a/sysdeps/unix/sysv/linux/alpha/sysconf.c b/sysdeps/unix/sysv/linux/alpha/sysconf.c
> index 51a2a47..30faa3f 100644
> --- a/sysdeps/unix/sysv/linux/alpha/sysconf.c
> +++ b/sysdeps/unix/sysv/linux/alpha/sysconf.c
> @@ -135,7 +135,7 @@ __sysconf (int name)
> if (shape <= 0)
> return shape;
>
> - switch (name % 3)
> + switch ((name - _SC_LEVEL1_ICACHE_SIZE) % 3)
> {
> case 0: /* total size */
> return shape & -0x100;
> --
> Aurelien Jarno GPG: 1024D/F1BCDB73aurelien@aurel32.net http://www.aurel32.net
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH][alpha] Fix _SC_LEVEL*CACHE*
2012-02-19 12:51 ` Aurelien Jarno
@ 2012-02-20 16:40 ` Richard Henderson
0 siblings, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2012-02-20 16:40 UTC (permalink / raw)
To: Aurelien Jarno; +Cc: libc-ports
On 02/19/12 04:51, Aurelien Jarno wrote:
>> 2011-04-01 Aurelien Jarno <aurelien@aurel32.net>
>>
>> * sysdeps/unix/sysv/linux/alpha/sysconf.c: Fix cache sysconf
>> switch.
Applied.
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
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2011-04-01 21:19 [PATCH][alpha] Fix _SC_LEVEL*CACHE* Aurelien Jarno
2012-02-19 12:51 ` Aurelien Jarno
2012-02-20 16:40 ` Richard Henderson
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